Agilent Technologies E5900B User Manual page 162

Glossary
Set, and an emulation module.
Stand-Alone Logic Analyzer A
standalone logic analyzer has a
predefined set of hardware
components which provide a specific
set of capabilities. A standalone logic
analyzer differs from a mainframe
logic analyzer in that it does not offer
card slots for installation of additional
capabilities, and its specifications are
not modified based upon selection
from a set of optional hardware
boards that may be installed within
its frame.
State Analysis A mode of logic
analysis in which the logic analyzer is
configured to capture data
synchronously with a clock signal in
the target system.
Subnet Mask A subnet mask blocks
out part of an IP address so the
networking software can determine
whether the destination host is on a
local or remote network. It is usually
represented as decimal numbers
separated by periods; for example,
255.255.255.0.
Symbol Symbols represent patterns
and ranges of values found on labeled
sets of bits. Two kinds of symbols are
available:
1) Object file symbols — Symbols
from your source code, and symbols
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generated by your compiler. Object
file symbols may represent global
variables, functions, labels, and
source line numbers.
2) User-defined symbols — Symbols
you create.
Target Board Adapter A daughter
board inside the E5900B emulation
probe which customizes the
emulation probe for a particular
microprocessor family. The target
board adapter provides an interface
to the ribbon cable which connects to
the debug port on the target system.
Target Control Port An 8-bit, TTL
port on a logic analysis system that
you can use to send signals to your
target system. It does not function
like a pattern generator or emulation
module, but more like a remote
control for the target's switches.
Target Interface Module A small
circuit board which connects the 50-
pin cable from an E5901A emulation
module or E5900A emulation probe
to signals from the debug port on a
target system. Not used with the
E5900B emulation probe.
TIM See Target Interface Module.
Timing Analysis A mode of logic
analysis in which the logic analyzer is
configured to capture data at a rate
Emulation for the Motorola M•CORE