Memory Size Switching Register - NEC mPD780024AS Series Preliminary User's Manual

8-bit single-chip microcontrollers
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18.1 Memory Size Switching Register

The µ PD78F0034BS allows users to select the internal memory capacity using the memory size switching register
(IMS) so that the same memory map as that of the µ PD780021AS, 780022AS, 780023AS, 780024AS and
µ PD780031AS, 780032AS, 780033AS, 780034AS with a different size of internal memory capacity can be achieved.
IMS is set by an 8-bit memory manipulation instruction.
RESET input sets IMS to CFH.
Caution
The initial value of IMS is "setting prohibited (CFH)". Be sure to set the value of the relevant
mask ROM versions at initialization.
Figure 18-1. Format of Memory Size Switching Register (IMS)
Address: FFF0H After reset: CFH R/W
Symbol
7
IMS
RAM2
RAM2
0
1
Other than above
ROM3
0
0
0
1
1
Other than above
The IMS settings to obtain the same memory map as mask ROM versions are shown in Table 18-2.
Caution
When using the mask ROM versions, be sure to set the value indicated in Table 18-2 to IMS.
CHAPTER 18 µ PD78F0034BS
6
5
RAM1
RAM0
RAM1
RAM0
1
0
512 bytes
1
0
1024 bytes
Setting prohibited
ROM2
ROM1
ROM0
0
1
1
0
1
1
0
0
1
1
Table 18-2. Memory Size Switching Register Settings
Target Mask ROM Versions
µ PD780021AS, 780031AS
µ PD780022AS, 780032AS
µ PD780023AS, 780033AS
µ PD780024AS, 780034AS
Preliminary User's Manual U16035EJ1V0UM
4
3
2
0
ROM3
ROM2
Internal high-speed RAM capacity selection
Internal ROM capacity selection
0
8 KB
0
16 KB
0
24 KB
0
32 KB
1
60 KB (setting prohibited)
Setting prohibited
IMS Setting
42H
44H
C6H
C8H
1
0
ROM1
ROM0
279

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