Toshiba TLCS-900/H1 Series Manual page 515

(5) Clock gear, PLL
Symbol Name Address
System
SYSCR0 clock control 10E0H
register 0
System
SYSCR1 clock control 10E1H
register 1
System
SYSCR2 10E2H
clock control
register 2
EMC
EMCCR0 control 10E3H
register 0
EMC
EMCCR1 control 10E4H
register 1
EMC
EMCCR2 control 10E5H
register 2
PLL
PLLCR0 control 10E8H
register 0
PLL
PLLCR1 control 10E9H
register 1
7 6 5
XEN XTEN
R/W
1 1
H-OSC L-OSC
(fc) (fs)
0: Stop 0: Stop
1: Oscillation 1: Oscillation
−
WUPTM1 WUPTM0
R/W
0 1
Always Warm-up timer
write "0"
00: Reserved
8
01: 2 /Inputted frequency
14
10: 2
16
11: 2
PROTECT
R
0
Protect
flag
0: OFF
1: ON
Switching the protect ON/OFF by write to following 1st KEY, 2nd KEY
1st KEY: EMCCR1=5AH, EMCCR2=A5H in succession write
2nd KEY: EMCCR1=A5H, EMCCR2=5AH in succession write
FCSEL LUPFG
R/W R
0 0
Select fc
Lock up
clock
timer
0: f
OSCH
status flag
1: f
PLL
PLLON
R/W
0
Control
on/off
0: OFF
1: ON
92CH21-513
4 3
SYSCK
R/W
0
Select
system
clock
0: fc
1: fs
HALTM1
R/W
0 1
HALT mode
00: Reserved
01: STOP mode
10: IDLE1 mode
/Inputted frequency
11: IDLE2 mode
/Inputted frequency
TMP92CH21
2 1 0
WUEF
R/W
0
Warm-up
timer
GEAR2 GEAR1 GEAR0
R/W
1 0 0
Select gear value of high
frequency (fc)
000: fc 101: (Reserved)
001: fc/2 110: (Reserved)
010: fc/4 111: (Reserved)
011: fc/8 100: fc/16
HALTM0
1
EXTIN
DRVOSCH DRVOSCL
R/W R/W R/W
0 1 1
High Low
1: External
frequency frequency
clock
oscillator oscillator
driver driver
ability ability
1: NORMAL 1: NORMAL
0: WEAK 0: WEAK
2009-06-19