Download Print this page

Toshiba TLCS-900/H1 Series Manual page 233

Original cmos 32-bit microcontroller
Hide thumbs Also See for TLCS-900/H1 Series:

Advertisement

3.10.3.28 Set Descriptor STALL Register
Set Descriptor STALL
bit Symbol
(07E8H)
Read/Write
Reset State
Bit0: S_D_STALL
0: Software control (Default)
1: Automatically STALL
3.10.3.29 Descriptor RAM
Descriptor RAM
bit Symbol
(0500H)
Read/Write
(067FH)
Reset State
This register sets whether returns STALL automatically in data stage or status
stage for Set Descriptor Request.
7
6
This register is used for store descriptor to RAM. The size of the descriptor is 384
bytes. However, when storing descriptor, write according to descriptor RAM structure
sample.
7
6
D7
D6
R/W
R/W
Undefined
Undefined
Read/Write timing is only possible before detection of USB_RESET or during
processing of SET_DESCRIPTOR request.
SET_DESCRIPTOR request processes from INT_SETUP assert until access of EOP
register.
If there is rewriting request of descriptor in SET_DESCRIPTOR, process the
request in the following sequence.
1)
Read every packet of the descriptor that is transferred by SET_DESCRIPTOR .
2)
When reading descriptor number of last packet finished, write all descriptors to
RAM for descriptor.
3)
When writing is completed, execute INIT_DESCRIPTOR of COMMAND register.
4)
When all the process is completed, access EOP register, and finish status stage.
5)
When INT_STATUS is received, it shows normal finish of status stage.
If USB_RESET is detected, it starts reading automatically. Therefore, when it
connects to the host, executing INIT_DESCRIPTOR command is not necessary.
5
4
5
4
D5
D4
R/W
R/W
Undefined
Undefined
Undefined
92CH21-231
3
2
1
3
2
1
D3
D2
D1
R/W
R/W
R/W
Undefined
Undefined
TMP92CH21
0
S_D_STALL
W
0
0
D0
R/W
Undefined
2009-06-19

Advertisement

loading

This manual is also suitable for:

Tmp92ch21fgJtmp92ch21