Toshiba TLCS-900/H1 Series Manual page 254

(c) Control transfer type
Control transfer type is configured in the three stages below.
• Setup stage
•
Data stage
• Status stage
Data stage is sometimes skipped. Each stage is configured in one or several
transactions. The UDC executes each transaction while managing three stages in
hardware. Control transfer has the 3 types given below depending on whether
there is data stage or not, and on direction.
• Control read transfer type
•
Control write transfer type
• Control write transfer type (No data stage)
The 3 transfer sequences are shown in Figure 3.10.6, Figure 3.10.7 and Figure
3.10.8.
The UDC automatically answers standard requests in hardware. Class request
and vendor request must have an intervening CPU controlling the UDC.
Below is the control flow in the UDC and the control flow in the intervening
CPU.
(c-1) Setup stage
Setup stage is the same as transmission bulk transaction except that token ID
becomes SETUP.
However, control flow in the UDC is different.
• Token: SETUP
• Data: DATA 0
• Handshake: ACK
Control flow
Below is the control flow in the UDC when SETUP token is received.
1. SETUP token packet is received and address, endpoint number and error
are confirmed. It also checks whether the relevant endpoint is in control
transfer mode.
2. STATUS register state is confirmed.
State returns to IDLE only if it is INVALID state.
In bulk transfer mode, receiving data is enabled by STATUS registers value
and FIFO condition. However, in SETUP stage, STATUS is returned to
READY and accessing from the CPU to FIFO is always prohibited, and
internal FIFO of endpoint 0 is cleared. It also prepares for following
dataphase.
If the CPU accesses Setup Received registers in the UDC, it recognizes
Device request as received, and accessing from the CPU to EP0 is enabled.
This function is for receiving a new request when the current device request
has not finished normally.
92CH21-252
TMP92CH21
2009-06-19