Download Print this page

Toshiba TLCS-900/H1 Series Manual page 346

Original cmos 32-bit microcontroller
Hide thumbs Also See for TLCS-900/H1 Series:

Advertisement

8/16 grayscales (4 bpp: 8 grayscales case, valid data is 3 bits but data space needs 4 bits)
Display memory image
Address 0
LSB
D0
0
1
2
3
4
5
1 pixel
Address 4
LSB
D0
32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63
LD bus output sequence
4-bit width A type
→ 19-16 ...
LD0
3-0
→ 23-20 ...
LD1
7-4
→ 27-24 ...
LD2
11-8
→ 31-28 ...
LD3
15-12
LD4
Not use
LD5
Not use
LD6
Not use
LD7
Not use
* 8 grayscales data format is the same as 16 grayscales, 1 pixel needs 4-bit space. LSB bit is invalid data.
This mode is not supported by 4-bit width B type and 8-bit width B type.
Figure 3.14.3 Relation of Memory Map Image and Output Data (2)
Address 1
6
7
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
Address 5
92CH21-344
Address 2
Address 6
8-bit width A type
LD0
LD1
LD2
LD3
LD4
LD5
LD6
LD7
TMP92CH21
Address 3
MSB
D31
Address 7
MSB
D31
→ 35-32 ...
3-0
→ 39-36 ...
7-4
→ 43-40 ...
11-8
→ 47-44 ...
15-12
→ 51-48 ...
19-16
→ 55-52 ...
23-20
→ 59-56 ...
27-24
→ 63-60 ...
31-28
2009-06-19

Advertisement

loading

This manual is also suitable for:

Tmp92ch21fgJtmp92ch21