Toshiba TLCS-900/H1 Series Manual page 10

Number of
Pin Name
Pins
P80
1
CS 0
P81
CS 1
1
SDCS
P82
CS 2
1
CSZA
SDCS
P83
1
CS 3
P84
WRUL
1
CSZB
ND 0 CE
P85
WRUU
1
CSZC
ND 1 CE
P86
CSZD
1
SRULB
P87
CSZE
1
SRUUB
P90
TXD0 1
I2SCKO
P91
RXD0 1
I2SDO
P92
SCLK0
1
CTS 0
I2SWS
P93
1
LGOE0
P94
1
LGOE1
P95
1
CLK32KO
LGOE2
P96 1
INT4
PX
P97 1
INT5
PY
PA0 to PA2
3
KI0 to KI2
PA3 to PA6
KI3 to KI6 4
LD8 to LD11
PA7
1
KI7
Table 2.3.2 Pin Names and Functions (2/5)
I/O
Output Port80: Output port
Output Chip select 0: Outputs "low" when address is within specified address area
Output Port81: Output port
Output Chip select 1: Outputs "low" when address is within specified address area
Output Chip select for SDRAM: Outputs "0" when address is within SDRAM address area
Output Port82: Output port
Output Chip select 2: Outputs "Low" when address is within specified address area
Output Expand chip select: ZA: Outputs "0" when address is within specified address area
Output Chip select for SDRAM: Outputs "0" when address is within SDRAM address area
Output Port83: Output port
Output Chip select 3: Outputs "low" when address is within specified address area
Output Port84: Output port
Output Write: Output strobe signal for writing data on pins D16 to D23
Output Expand chip select: ZB: Outputs "0" when address is within specified address area
Output Chip select for NAND flash 0: Outputs "0" when NAND flash 0 is enabled
Output Port85: Output port
Output Write: Output strobe signal for writing data on pins D24 to D31
Output Expand chip select: ZC: Outputs "0" when address is within specified address area
Output Chip select for NAND flash 1: Outputs "0" when NAND flash 1 is enabled
Output Port86: Output port
Output Expand chip select: ZD: outputs "0" when address is within specified address area
Output Data enable for SRAM on pins D16 to D23
Output Port87: Output port
Output Expand chip select: ZE: Outputs "0" when address is within specified address area
Output Data enable for SRAM on pins D24 to D31
I/O Port90: I/O port
Output Serial 0 send data: Open-drain output programmable
2
Output I S clock output
I/O Port91: I/O port (Schmitt-input)
Input Serial 0 receive data
2
Output I S data output
I/O Port92: I/O port (Schmitt-input)
I/O Serial 0 clock I/O
Input Serial 0 data send enable (Clear to send)
2
Output I S word select output
I/O Port93: I/O port
Output Output enable-0 for external TFT-LCD driver
I/O Port94: I/O port
Output Output enable-1 for external TFT-LCD driver
Output Port95: Output port
Output Output fs (32.768 kHz) clock
Output Output enable-2 for external TFT-LCD driver
Input Port 96: Input port (Schmitt-input)
Input Interrupt request pin4: Interrupt request with programmable rising/falling edge
Output X-Plus: Pin connectted to X+ for touch screen panel
Input Port 97: Input port (Schmitt-input)
Input Interrupt request pin5: Interrupt request with programmable rising/falling edge
Output Y-Plus: Pin connectted to Y+ for touch screen panel
Input Port: A0 to A2 port: Pin used to input ports (Schmitt input, with pull-up resistor)
Input Key input 0 to 2: Pin used for key-on wakeup 0 to 2
Input Port: A3 to A6 port: Pin used to input ports (Schmitt input, with pull-up resistor)
Input Key input 3 to 6: Pin used for key-on wakeup 3 to 6
Output Data bus 8 to 11for LCD driver
Input Port: A7 port: Pin used to input ports (Schmitt input, with pull-up resistor)
Input Key input 7: Pin used for key-on wakeup 7
Function
92CH21-8
TMP92CH21
2009-06-19