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Toshiba TLCS-900/H1 Series Manual page 385

Original cmos 32-bit microcontroller
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SDCMM
Bit symbol
(0253H)
Read/Write
Reset State
Function
Note 1: <SCMM2:0> is automatically cleared to "000" after the specified command is issued. Before writing the next
command, make sure that <SCMM2:0> is "000". In the case of the Self Refresh Entry command, however,
<SCMM2:0> is not cleared to "000" by execution of this command. Thus, this register can be used as a flag
for checking whether or not Self Refresh is being performed.
Note 2: The Self Refresh Exit command can only be specified while Self Refresh is being performed.
SDRAM Command Register
7
6
5
Figure 3.16.1 SDRAM Control Registers
92CH21-383
4
3
2
SCMM2
0
Command issue
(Note 1) (Note 2)
000: Not execute
001: Initialization sequence
a. Precharge All command
b. Eight Auto Refresh commands
c. Mode Register Set command
100: Mode Register Set command
101: Self Refresh Entry command
110: Self Refresh Exit command
Others: Reserved
TMP92CH21
1
0
SCMM1
SCMM0
R/W
0
0
2009-06-19

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