Toshiba TLCS-900/H1 Series Manual page 268

Original cmos 32-bit microcontroller

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Note: EPx_DATASET changes at 2 clocks of 12MHz after receiving SOF. Read data from FIFO after EPx_DATASET

EPx_DATASET_A

EPx_DATASET_B

In renewed frame, Packet A's FIFO interchanges with packet B's FIFO, and

the transaction uses the same flow.

If SOF token is not received by error and so on, this data is lost because the

frame is not renewed. There is no problem in receiving PID and if frame data

is received with CRC error, USB sets LOST to STATUS on FRAME register,

and exact frame number is unknown. However, in this case, SOF is asserted

and FIFO condition is renewed. If SOF token is received without transmit and

transfer Isochronous in frame, UDC clears FIFO (X Condition) and sets

STATUS to FULL.

These are shown in Figure 3.10.12.

2clocks (12MHz)

Figure 3.10.11 Isochronous Receiving mode

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