Toshiba TLCS-900/H1 Series Manual page 255

3. Data packet is received.
Device request of 8 bytes from SIE in UDC is transferred to the request
register below.
•
bmRequestType register
• bmRequest register
•
wValue register
• wIndex register
• wLength register
4. After last data is transferred, counted CRC is compared with transferred
CRC. If they do not correspond, STATUS is set to RX_ERR and the state
returns to IDLE. At this point it does not return ACK, and host retries.
5. If CRC corresponds with toggle and it finishes normally, ACK handshake
is returned to host. The process in the UDC is shown below.
•
Receiving device request is judged whether software control or
hardware control. If the request needs control in software,
INT_SETUP interrupt is asserted. If hardware is used, INT_SETUP
interrupt is not asserted.
• According to stage control flow, prepare for next stage.
•
Set STATUS to DATAIN.
• Set toggle bit to "1".
The Setup stage is completed by the above.
This flow is shown in Figure 3.10.5.
8-byte data that is transferred by this SETUP stage is device request.
The CPU must process corresponding to device request.
The UDC detects the following contents only from data of 8 bytes, and it
manages stage in hardware.
• Whether there is data stage or not
•
Data stage direction
These are used to determine control read transfer type, control write
transfer type, and control write transfer type (no data phase).
92CH21-253
TMP92CH21
2009-06-19