Toshiba TLCS-900/H1 Series Manual page 352

Original cmos 32-bit microcontroller

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(8-bit case)

Use internal signal

to CPU (Interrupt)

Use internal signal

(Internal) BUSRQ

Condition: FP [9:0] setting = 240 (COM) + 63, LCDDVM<FMN7:0> = 0BH

= 78.02 Hz (at <FP9:0> = 120)

1-picture display time

Data transmission

(1 row data)

Figure 3.14.6 Whole Timing Diagram of SR Mode

Figure 3.14.7 Detailed Timing Diagram of SR Mode

Figure 3.14.8 Waveform of LLP, LFR

: CPU opration time

LP301 LP302 LP303 LP304

Note: XT = 1/32768 [s]

1 state = 1/f

Tmp92ch21fg Jtmp92ch21