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Toshiba TLCS-900/H1 Series Manual page 328

Original cmos 32-bit microcontroller
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(10) Setting PAGE register (for PAGE0/1)
PAGER
Bit symbol
(1327H)
Read/Write
Reset State
Function
Read-modify-write
instruction is
prohibited.
Note: Please keep the setting order below of <ENATMR>, <ENAAML> and <INTENA>. Set different times for
Clock/Alarm setting and interrupt setting.
(Example) Clock setting/Alarm setting
(11) Setting reset register (for PAGE0/1)
RESTR
Bit symbol
(1328H)
Read/Write
Reset State
Read-modify
write-instructio
Function
n is prohibited.
7
6
INTENA
R/W
0
INTRTC
0: Disable
"0" is read.
1: Enable
ld
(pager), 0ch
ld
(pager), 8ch
:
7
6
DIS1Hz
DIS16Hz
RSTTMR
1Hz
16Hz
1:Clock
0: Enable
0: Enable
1: Disable
1: Disable
0
Unused
RSTALM
1
Reset alarm register
0
Unused
RSTTMR
1
Reset counter
<DIS1HZ>
<DIS1HZ>
1
1
0
1
1
0
Others
5
4
ADJUST
ENATMR
W
Undefined
0: Don't
Clock
care
0: Disable
1: Adjust
1: Enable
:
Clock, Alarm enable
Interrupt enable
0
PAGE
1
0
1
ADJUST
5
4
RSTALM
W
Undefined
1: Alarm
reset
reset
(PAGER)
<ENAALM>
1
0
0
92CH21-326
3
2
1
ENAALM
R/W
Undefined
ALARM
0: Disable
"0" is read.
1: Enable
Select Page0
Select Page1
Don't care
Adjust sec. counter.
When this bit is set to "1" the sec. counter
becomes "0" when the value of the sec. counter
is 0 – 29. When the value of the sec. counter is
30-59, the min. counter is carried and sec.
counter becomes "0". Output Adjust signal
during 1 cycle of f
. After being adjusted
SYS
once, Adjust is released automatically.
(PAGE0 only)
3
2
1
Always write "0"
Source signal
Alarm
1Hz
16Hz
Output "0"
TMP92CH21
0
PAGE
R/W
Undefined
PAGE
selection
0
2009-06-19

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