Toshiba TLCS-900/H1 Series Manual page 21

3.3.1 Block Diagram of System Clock
SYSCR0<XTEN >
XT1
Low-frequency
XT2
oscillator
SYSCR0<XEN >
X1
High-frequency
oscillator
X2
f
OSCH
(48 MHz) = f
f
USB OSCH
f
SYS
f
IO
φT0
fs
(a) USB in use, with PLL
(b) USB not in use, with PLL
(c) USB not in use, without PLL
Note: When using USB, the high-frequency oscillator should be 9.0 MHz.
SYSCR0<WUEF>
SYSCR2<WUPTM1:0>
Warm-up timer
(High/low-frequency oscillator)
Lock up timer
(PLL)
PLLCR1<PLLON>,
PLLCR0<LUPFG>
fs
fc
fc/2
= f × 4
f
PLL OSCH
Selector
Clock doubler
(PLL) ÷2
PLLCR0<FCSEL>
× 16/3
USBCR1<USBCLKE>
TMRA0 to 3,TMRB0
Prescaler
SIO0 to SIO1
Prescaler
RTC
MLD/ALM
ADC
WDT
Figure 3.3.2 Block Diagram of System Clock
Table 3.3.1 Selection Example for f
High-frequency
Oscillation: f
9.0 MHz
10.0 MHz (max)
40.0 MHz (max)
92CH21-19
fc/4
fc/8
SYSCR1<SYSCK>
fc/16
÷4 ÷8 ÷16
SYSCR1<GEAR2:0>
Clock-gear
USB
Controller
CPU
RAM, ROM
Interrupt
controller
2
I S
I/O ports
SDRAMC
OSCH
System Clock:
f
SYS
OSCH
18 MHz
20 MHz (max)
20 MHz (max)
TMP92CH21
φT
φT0
f
FPH
÷4 ÷8
fs
÷2
f
SYS
÷2
f
IO
LCDC
Memory
controller
NAND flash
controller
TSI
USB Clock: f
USB
48 MHz
−
−
2009-06-19