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XPS-Q8 Controller
20.0
Appendix B: General I/O Description
XPSDocumentation V1.4.x (EDH0301En1060 — 10/17)
This paragraph briefly describes all XPS signal types.
A description of each XPS connector interface is detailed in further paragraphs.
20.1
Digital I/Os (All GPIO, Inhibit and Trigger In, and PCO Connectors)
All digital I/Os are TTL compatible:
• All digital I/Os are not isolated, but are referenced to electrical ground (GND).
• Input levels must be between 0 V and +5 V.
• Output levels should be at least +5 V (up to 30 V absolute maximum rating with
open collector outputs).
• Outputs must be pulled up to the user's external power supply (+5 V to +24 V). This
external power supply must be referenced to the XPS ground (GND).
All digital I/Os are refreshed asynchronously on user requests. Therefore, digital inputs
or outputs have no refresh rate.
Typical delay is 100µs due to the clock cycle and priorities made to other functions.
All digital inputs are identical, except for GPIO3 inhibition input (described with
GPIO3).
All digital inputs are in negative logic and have internal +5 V pull up resistors.
20.1.1
Digital Inputs
Parameter
Low Level Input Voltage
High Level Input Voltage
Input Current LOW
Input Current HIGH
GPIOn inputs (n = 1 to 4) can be accessed via the GPIODigitalGet(GPIOn.DI, ...)
function.
All digital outputs are identical.
All digital outputs are in negative logic (NPN open collector, 74LS06 TTL type circuit)
and have no internal pull up to permit levels above +5 V.
Symbol
V
IL
V
IH
I
IL
I
IH
Figure 63: Digital TTL Input.
206
Appendix
Min.
Max.
0
0.8
1.6
5
–
-2.5
–
0.4
Units
V
V
mA
mA
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