Baud Clock; Real Time Clock; Clock Generation Circuit; Baud Clock Generator - ZiLOG System 8000 Hardware Reference Manual

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CPU
Zilog
CPU
~
1
.------------~
~
M CU< P1-278
MASTER
....---r-~ClL-"r~--4~~
~---<I ~+--------.
INT 4 PHI
,..-:;....--t---------...
INT 2 PHI
.JO-ot--.......
..,...=...t
~....,;.j
>"-..1.0-
I!'T PHI-
..--~----__:_--.-.
INT PHI
~.,...._+_---_+_------~
:>"=--.-.
CLOCK A
zaoOAVR
.....
----+-------~
~,;:,.a
_ - . .
Cl.OCX
a}
PERIPHERAL
un
FROIIT3
WAITSTATI
QEHERATOR
UI7
8 CLK P2-27C
(SYSfDl 8U$
TO SYSTEM RESET
LOGIC
ua .
Figure 4-1
Clock Generation Circuit (Sheet 11)
4.2.1.
Baud Clock:
The
2.4576
MHz
oscillator
(U83)
is
divided
by
two
by U83 and supplies baud rate clock to the
counter-timer circuits (CTCs) for
baud
generation
to
the
serial
input/output (SIO) circuits.
The baud rate clock is
applied directly to the CTCs to produce a programmable
baud
rate independent of the system clock rate.
1f!
01---...·
fIAUOCLK
1--....
1
'""4"
~
W1"a
TO CTC 0.1,2
+2
Figure 4-2
Baud Clock Generator (Sheet 11)
4.2.2.
Real Time Clock:
A real time clock is
concatenated
from
two spare channels in CTC 2 (U89).
These channels are
driven by an independent baud rate oscillator
so
that
CTC
programming
remains
independent
of
the system clock fre-
quency.
4-3
Zilog
4-3

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