IBM 4300 Manual page 265

(the value when the first operand was exhausted,
and X'20A6E' (the current value for the second
operand).
When the comparison ends, the condition code is
set to 0, 1, or 2, depending on whether the first
operand is equal to, less than, or greater than the
second operand, respectively.
When the operands are unequal, the addresses in
registers 4 and 8 locate the bytes that caused the
mismatch.
CONVERT TO BINARY (CVB)
The CONVERT TO BINARY instruction converts
an eight-byte, packed-decimal number into a signed
binary integer and loads the result into a general
register. After the conversion operation is
completed, the number is in the proper form for use
as an operand in signed binary arithmetic. For
example, assume:
Storage locations 7608-760F contain a decimal number in
the packed format: 00 00 00 00 00 25 59 4C (+25,594).
The contents of register 7 are not significant.
Register 13 contains 000076 00.
The format of the conversion instruction is:
Machine Format
4F 7 0
°
I
008
1
Assembler Format
Op Code R1,D2(X2,B2)
CVB 7,8(0,13)
After the instruction is executed, register 7
contains 00 00 63 FA.
CONVERT TO DECIMAL (CVD)
The CONVERT TO DECIMAL instruction
performs functions exactly opposite to those of the
CONVERT TO BINARY instruction. CVD
converts a signed binary integer in a register to
packed decimal and stores the eight-byte result.
For example, assume:
Register 1 contains the signed binary integer: 00 00 OF OF.
Register 13 contains 00 00 76 00.
A-12 IBM 4300 Processors Principles of Operation
The format of the instruction is:
Machine Format
Op Code R1
4E
o
o
I
008
1
Assembler Format
Op Code R1,02(X2,B2)
CVO 1,8(0,13)
After the instruction is executed, storage
locations 7608-760F contain 00 00 00 00 00 03 85
5C (+3855).
The plus sign generated is the preferred plus
sign, 1100
2 ,
DIVIDE (D, DR)
The DIVIDE instruction divides the dividend in an
even-odd register pair by the divisor in a register or
in storage. Since the dividend is assumed to be 64
bits long, it is important that the proper sign be
first affixed. For example, assume that:
Storage locations 3550-3553 contain 00 0008 DE - 227010
== the dividend.
Storage locations 3554-3557 contain 000000 32 - 5010 -
the divisor.
The initial contents of registers 6 and 7 are not significant.
Register 8 contains 00 00 35 50.
The following assembler language statements
load the registers properly and perform the divide
operation:
Statement Comments
L
6,0(0,8) Places 00 00 08 DE into
SRDA 6,32(0)
register 6.
Shifts 00 00 08 DE into
register 7. Register
is filled with zeros
6,4(0,8)
(sign bits).
0
Performs the division.
The machine format of the above DIVIDE
instruction is:
Machine Format
50 6 0
6