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IBM 4300 Manual page 261

Processors principles of operation for ecps: vse mode
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LUPE
AR
8, 1
BACK
BCT
6,LUPE
where register 6 contains 00 00 00 03 and the
address of LUPE is 6826. Assume that, in order to
address this location, register lOis used as a base
register and contains 00 00 68 00.
The format of the BCT instruction is:
Machine Format
Op Code
46
6
°
Assembler Format
Op Code
R1,D2CX2,B2)
BCT
6,X I 26 I CO,10)
The effect of the coding is to execute three times
the loop defined by locations L UPE through
BACK.
BRANCH ON INDEX HIGH (BXH)
The BRANCH ON INDEX HIGH instruction is an
index-incrementing and loop-controlling instruction
that causes a branch whenever the sum of an index
value and an increment value is greater than some
compare value. For example, assume that:
Register 4 contains 00 00 00 SA
=
13810
=
the index.
Register 6 contains 0000 00 02
=
210
=
the increment.
Register 7 contains 00 00 00 AA
=
17010
=
the compare
value.
Register 10 contains 00 00 71 30
=
the branch address.
The format of the instruction is:
Machine Format
Op Code
86
4
6
A
I
0001
Assembler Format
Op Code
R1,R3,D2(B2)
BXH
4,6,0(10)
A-8
IBM 4300 Processors Principles of Operation
When the instruction is executed, first the
contents of register 6 are added to register 4,
second the sum is compared with the contents of
register 7, and third the decision whether to branch
is made. After execution:
Register 4 contains 00 00 00
se
=
14010
Registers 6 and 7 are unchanged.
Since the new value in register 4 is not yet
greater than the value in register 7, the branch to
address 7130 is not taken. Repeated use of the
instruction will eventually cause the branch to be
taken when the value in register 4 reaches 172.
When the register used to contain the increment
is odd, that register also becomes the
compare-value register. The following
assembler-language subroutine illustrates how this
feature may be used to search a table.
Table
2 Bytes
2
Bytes
ARG1
FUNCT1
ARG2
FUNCT2
ARG3
FUNCT3
ARG4
FUNCT4
ARG5
FUNCT5
ARG6
FUNCT6
Assume that:
Register S contains the search argument.
Register 9 contains the width of the table in bytes (00 00 00
04).
Register 10 contains the length of the table in bytes (0000
00 IS).
Register 11 contains the starting address of the table.
Register 14 contains the return address to the main
program.
As the following subroutine is executed, the
argument in register 8 is successively compared
with the arguments in the table, starting with
argument 6 and working backward to argument 1.
If
an equality is found, the corresponding function
replaces the argument in register 8.
If
an equality
is not found, FFFF
16
replaces the argument in
register 8.
SEARCH
LNR
9,9
NOTEQUAL
BXH
10,9,LOOP
NOT FOUND
LA
8,XIFFFFI
BCR
15, 14
LOOP
CH
8,0(2,3)
BC
7,NOTEQUAL
LH
8,2(10,11)
BCR
15, 14
The first instruction (LNR) causes the value in
register 9 to be made negative. After execution of
(

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