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LOAD COMPLEMENT (LCDR,LCER) floating-point
instructions
9-10
LOAD COMPLEMENT (LCR) binary instruction
7-19
LOAD CONTROL (LCTL) instruction
10-6
LOAD FRAME INDEX (LFI) instruction
10-6
LOAD HALFWORD (LH) instruction
7-20
examples
A-16
load indicator
13-3
LOAD MULTIPLE (LM) instruction
7-20
LOAD NEGATIVE (LNDR,LNER) floating-point
instructions
9-11
LOAD NEGATIVE (LNR) binary instruction
7-20
load-normal key
13-3
LOAD POSITIVE (LPDR,LPER) floating-point
instructions
9-11
LOAD POSITIVE (LPR) binary instruction
7-20
LOAD PSW (LPSW) instruction
10-7
LOAD ROUNDED (LRDR,LRER) instructions
9-11
load state
4-1
assigned storage while in
3-10
in initial program loading
4-24
load-unit-address controls
13-3
loading (initial)
(see
initial program loading, initial
microprogram loading)
location not provided (of operand)
location 80 (for interval timer)
logical
6-10
4-20
arithmetic
(,see
unsigned binary arithmetic)
comparison
7-3
connective
AND
7-8
EXCLUSIVE OR
7-16
OR
7-27
data
7-2
logout
channel
12-60
limited channel
12-60
assigned storage location for
3-10
pending (bit in CSW)
12-47
long floating-point number
9-2
long I/O block
12-53
lookaside for storage keys
11-3
loop control
5-5
loop of interruptions
(see
string of interruptions)
m
machine check
11-1
(see also
malfunction)
interruption
6-9, 11-5
action
11-6
code (MCIC)
11-7
mask in PSW
4-5, 4-6
subclass masks
11-12
machine-save key
13-3
machine-status saving and retrieval
4-25
main storage
3-1
(see also
storage)
MAKE ADDRESSABLE (MAD) instruction
MAKE UNADDRESSABLE (MUN) instruction
malfunction
11-1
correction of
11-2
effect of DIAGNOSE instruction
10-4
effect on manual operation
13-1
indication of
11-2
manual indicator
13-3
(see also
stopped state)
manual operations
13-1
10-7
10-7
manual operations
(continued)
controls
address-compare
alter-and-display
13-1
13-2
check
13-2
IML
13-2
interval-timer
load-unit-address
13-3
13-3
power
13-4
rate
13-4
storage-size
TOO-clock
keys
interrupt
load-clear
load-normal
machine-save
13-4
13-6
13-3
13-3
13-3
13-4
restart
13-4
start
13-5
stop
13-5
system-reset-clear
system-reset-normal
masks
6-4
(see also
interruption)
channel
6-9
13-5
13-5
in BRANCH ON CONDITION instruction
7-9
in COMPARE LOGICAL CHARACTERS UNDER
MASK instruction
7 -13
in INSERT CHARACTERS UNDER MASK
instruction
7 -18
in PSW
4-5, 4-6
in STORE CHARACTERS UNDER MASK
instruction
7-32
machine-check-subclass
degradation-report
external-damage-report
11-12
11-12
11-12
recovery-report
11-12
warning
11-12
monitor
6-12
PER event
4-9
PER general-register
4-9
program-interruption
6-10
maximum negative number
7-2
MCIC (machine-check-interruption code)
message byte
8-6
microprogram, initial loading of
mode
architectural
1-1
BC
(see
BC mode)
burst (channel operation)
12-3
byte-multiplex (channel operation)
EC
(see
EC mode)
ECPS:VSE
1-1
indicator
13-4
System/370
1-1
model
channel
12-24
CPU
10-12
13-2
11-8
12-3
modifier bits (in CCW command code)
12-29
MONITOR CALL (MC) instruction
7-21
monitor class and code, assigned storage locations
for
3-10
monitor event
6-12
monitoring
for PER events
(see
PER)
with MONITOR CALL
6-12
MOVE (MVC,MVI) instructions
7-21
examples
A-16
MOVE INVERSE (MVCIN) instruction
7-22
Index
X-7
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