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IBM 4300 Manual page 311

Processors principles of operation for ecps: vse mode
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U
underflow
(see
exponent underflow)
unit check
12-51
unit exception
12-52
unit of operation
5-6
unit status
12-48
validity flag for
12-61
unnormalized floating-point number
9-2
UNPACK (UNPK) instruction
7-37
example
A-25
unsigned binary
arithmetic
7-3
integer
7-2
examples
A-3
in address generation
5-4
update reference
5-11
V
valid CBC
11-2
validation
11-3
of page description
11-3
of registers
11-4
of storage
11-3
of time-of-day clock
11-4
validity bits (in machine-cheek-interruption code)
validity flags (in limited channel logout)
12-61
variable-length field
3-2
version code
10-12
virtual address
3";1
virtual storage
3-4
VSE mode
(see
ECPS:VSE mode)
X-12
IBM 4300 Processors Principles of Operation
11-11
w
wait indicator
13-5
wait state (bit in PSW)
4-5, 4-6
warning (machine-check condition)
11-10
mask bit for
11-12
word
3-2
working state (I/O system)
12-9
wraparound
of instruction addresses
5-4
of PER addresses
4-11
of register numbers
for LOAD MULTIPLE instruction
for STORE MULTIPLE instruction
of storage addresses
3-1
for MOVE INVERSE instruction
for MOVE LONG instruction
of time-of-day clock
4-18
write (I/O command)
12-36
x
X field of instruction
5-4
Z
zero, true
9-1
ZERO AND ADD (ZAP) instruction
example
A-30
zero instruction-length code
6-5
zone bits
8-1
moving of
7 -26
zoned decimal numbers
8-1
examples
A-4
7-20
7-33
8-11

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