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IBM 4300 Manual page 286

Processors principles of operation for ecps: vse mode
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Execution of
Execution of
instruction
instruction
01
FLAGS,X'Ol'
FLAGS
01
FLAGS,X'SO'
on CPU A
on CPU B
X'OO'
Fetch
FLAGS X'OO'
Fetch
X'OO'
FLAGS X'OO'
X'OO'
OR X'SO'
into X'OO'
OR X'
a
l'
X'OO'
into X'OO'
X'SO'
Store X'SO'
into FLAGS
Store X'Ol'
X'
a
l'
into FLAGS
FLAGS should have value of X'S1' follow-
ing both updates.
The problem shown here is that the value stored
by the 01 instruction executed on CPU A overlays
the value that was stored by CPU B. The X'80'
flag bit was erroneously turned off, and the date is
now invalid.
The COMPARE AND SWAP instruction has
been provided to overcome this and similar
problems.
COMPARE AND SWAP (CS, CDS)
The COMPARE AND SWAP (CS) and
COMPARE DOUBLE AND SWAP (CDS)
instructions can be used in multiprogramming or
multiprocessing environments to serialize access to
counters, flags, control words, and other common
storage areas.
The following examples of the use of the
COMPARE AND SWAP and COMPARE
DOUBLE AND SW AP instructions illustrate the
applications for which the instructions are intended.
It
is important to note that these are examples of
functions that can be performed by programs
running enabled for interruption
(multiprogramming) or by programs that are
running on a multiprocessing configuration. That
is, the routine allows a program to modify the-
contents of a storage location while running
enabled, even though the routine may be
interrupted by another program on the same CPU
that will update the location, and even though the
possibility exists that another CPU may
simultaneously update the same location.
The CS instruction first checks the value of a
storage location and then modifies it only if the
value is what the program expects; normally this
would be a previously fetched value.
If
the value
in storage is not what the program expects, then
the location is not modified; instead, the current
value of the location is loaded into a general
register, in preparation for the program to loop
back and try again. During the execution of CS,
no other CPU can access the specified location.
Setting a Single Bit
The following instruction sequence shows how the
CS instruction can be used to set a single bit in
storage to one. Assume that FLAGS is the first
byte of a word in storage called "WORD."
LA
6,X'SO'
SLL 6,24
L
7,WORD
RETRY LR
S,7
OR
S,6
Put bit to be ORed
into GR6
Shift left 24 places to
align the byte to be
ORed with the loca-
tion of FLAGS within
WORD
Get original flag bit
values
Put flags to be modi-
fied into GRS
Set bit to one in new
copy of flags
CS
7,8,WORD
Store new flags unless
original flags were
changed
BC
4,RETRY
If new flags are not
stored, try again
The format of the CS instruction is:
Machine Format
Op Code
I
1
BA
7
S
1****1
Assembler Format
Op Code
R1,R3,S2
CS
7,S,WORD
The CS instruction compares the first operand
(general register 7 containing the original flag
values) to the second operand (WORD) while
storage access to the specified location is not
permitted to any CPU other than the one executing
the CS instruction.
If
the comparison is successful, indicating that
FLAGS still has the same value that it originally
had, the modified copy in general register 8 is
stored into FLAGS.
If
FLAGS has changed since
it was loaded, the compare will not be successful,
and the current value of FLAGS is loaded into
general register 7.
Appendix A. Number Representation and
Instruction~Use
Examples
A~33

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