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1.
2.
3.
4.
5.
Specification exception due to a one in an unassigned
bit position of an EC-mode PSW.1
Specification exception due to an odd instruction
address in the PSW.
6.
7.A
7.B
Access exceptions for first halfword of EXECUTE.2
Access exceptions for second halfword of EXECUTE.2
Specification exception due to target instruction of
EXECUTE not being specified on halfword boundary.2
Access exceptions for first instruction halfword.
Access exception for second instruction halfword. 3
Access exception for third instruction halfword. 3
Operation exception.
7. C. 1
7.C.2
7.C.3
7.C.4
8.A
Privileged-operation exception.
Execute exception.
Special-operation exception.
Specification exception due to conditions other than
those included in
1,
2 and 5 above.
8.B
8.C
8.0
8.E
9.
10.
Access exceptions for any particular access to an
operand in
stor~ge.4
Data exception.
Decimal-divide exception. 6
Page-state exception.
Page-transition exception.
Fixed-point divide, floating-point divide, and
conditions, other than PER events, which result in
completion.
These conditions are mutually exclusive,
or their priority is specified in the corresponding
definitions.
Explanation:
Numbers indicate priority, with priority decreasing in
ascending order of numbers; letters indicate no priority.
A one may be introduced in an unassigned bit position of
an EC-mode PSW by a new PSW loaded as a result of an in-
terruption or by the instructions LOAD PSW, SET SYSTEM
MASK, and STORE THEN OR SYSTEM MASK.
The priority shown
in the chart is that for a PSW error introduced by an in-
terruption and may also be considered as the priority for
a PSW error introduced by the previous instruction.
The
error is introduced only if the instruction encounters no
other exceptions. The resulting interruption has a higher
priority than any interruption caused by the instruction
which would have been executed next; it has a lower
priority, however, than any interruption caused by the
instruction which introduced the erroneous PSW.
Priority of Program-Interruption Conditions (Part 1 of 2)
Chapter 6. Interruptions
6-17
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