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must be a valid decimal digit. After execution,
condition code 2 is set to show that the result is
greater than zero.
Decimal Right Shift
In this example, the contents of storage location
FIELD2 are shifted one place to the right,
effectively dividing the contents of FIELD2 by 10
and discarding the remainder. FIELD2 is five
bytes in length. The following instruction performs
this operation:
Machine Format
Op Code
FO
4
o
1****1
Assembler Format
Op Code
Sl(L1),S2,13
SRP
FIELD2(5),64-1,0
0111111
T
6-bit two s
complement
for -1
FIELD 2 (before):
01 23 45 67 8C
FIELD 2 (after):
00 12 34 56 7C
In the SRP instruction, shifts to the right are
specified in the second-operand address by negative
shift values, which are represented as a six-bit
value in two's complement form.
The six-bit two's complement of a number, n,
can be specified as 64 - n. In this example, a
right shift of one is represented as 64 - 1.
Condition code 2 is set.
Decimal Right Shift and Round
In this example, the contents of storage location
FIELD3 are shifted three places to the right and
rounded, effectively dividing by 1000 and rounding
to the nearest whole number. FIELD3 is four
bytes in length.
Machine Format
Op Code
FO
3
5
1****1
~
Assembler Format
Op Code
Sl(L1),S2,13
SRP
FIELD3(4),64-3,5
00111101
T
6-bit two s
complement
for -3
FIELD 3 (before):
1239 60 OD
FIELD 3 (after):
00 01 24 OD
The shift amount (three places) is specified in
the D2 field. The 13 field specifies the rounding
factor of 5. The rounding factor is added to the
last digit shifted out (which is a 6), and the carry is
propagated to the left. The sign is ignored during
the addition.
Condition code 1 is set because the result is less
than zero.
Multiplying by a Variable Power of 10
Since the shift value designated by the SRP
instruction specifies both the direction and amount
of the shift, the operation is equivalent to
multiplying the decimal first operand by 10 raised
to the power specified by the shift value.
If the shift value is variable, it may be specified
by the B2 field instead of the displacement D2 of
the SRP instruction. The general register
designated by B2 should contain the shift value
(power of 10) as a signed binary integer.
A fixed scale factor modifying the variable
power of 10 may be specified by using both the B2
field (variable part in a general register) and the D2
field (fixed part in the displacement).
The SRP instruction uses only the rightmost six
bits of the effective address D 2 (B 2 ) and interprets
them as a six-bit signed binary integer to control
the left or right shift as in the previous two
examples.
Appendix A. Number Representation and
Instruction~Use
Examples
A~29
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