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of a condition code, then an I/O selective reset
may have been performed. A CSW is stored
identifying the cause of the malfunction.
The device addressed by the I/O instruction is
not necessarily the device that is reset.
When a malfunction occurs and the program is
alerted by a machine-check interruption, then an
I/O selective reset may have been performed. This
mayor may not be accompanied by an I/O
interruption. When no I/O interruption occurs, a
CSW is not stored and a device is not identified.
Condition Code
The results of certain tests by the channel and
device, and the original state of the addressed part
of the I/O system are used during the execution of
an I/O instruction to set one of four condition
codes in the PSW. The condition code is set at the
time the execution of the instruction is concluded,
that is, the time the CPU is released to proceed
with the next instruction. The condition code
ordinarily indicates whether or not the function
specified by the instruction has been performed
and, if not, the reason for the rejection. In the
case of START I/O FAST RELEASE executed
independent of the device, a condition code 0 may
be set that is later superseded by a deferred
condition code stored in the CSW.
The figure "Condition-Code Settings for I/O
States and Instructions" lists the I/O-system states
and the corresponding condition codes for each
I/O instruction. The I/O-system states and
associated abbreviations were defined in the section
"States of the Input/Output System" earlier in this
chapter. The digits in the figure represent the
decimal value of the code.
Chapter 12. Input/Output Operations
12-11
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