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DISCONNECT PAGE
I
B 21C
l
o
16
20
31
If
connected, the storage page designated by the
second-operand address enters the disconnected
state.
If
already disconnected, the page remains in
the disconnected state. The reference and change
bits of the page are set to zeros.
Bits 8-20 of the second-operand address
designate the page. Bits 0-7 and 21-31 of the
address are ignored.
If
bits 8-20 of the second-operand address are
zeros, that is, page 0 is specified, a specification
exception is recognized, and the operation is
suppressed.
If
the page is in the addressable state, a
page-transition exception is recognized, and the
operation is suppressed.
The condition code indicates whether the page
was connected (0) or disconnected (1) before.
If
the page was connected before, the value of the
free-frame-capacity count is increased by one.
The contents of the disconnected page frame are
not necessarily cleared by the machine. The next
time this frame is connected to a page by some
CONNECT instruction, its contents will be
unpredictable.
Resulting Condition Code:
o
Page was connected
1
Page was already disconnected
2
3
Program Exceptions:
Addressing (operand 2)
Page Transition
Privileged Operation
Specification
INSERT PAGE BITS
IPB
o
8
12
16
20
31
The current settings of the three programmable
page bits and the reference and change bits that are
associated with the storage page designated by the
second-operand address are inserted in the general
register designated by the Rl field.
Bits 8-20 of the second-operand address
designate the page. Bits 0-7 and 21-31 of the
address are ignored. Bits 12-15 of the instruction
are ignored.
The current values of the three page bits are
inserted in bit positions 25-27, and the reference
and change bits in bit positions 29-30 of the
register designated by the
Rl
field. The contents
of bit positions 24, 28, and 31 of that register are
set to zeros. The contents of bit positions 0-23
remain unchanged.
The references to the page bits and to the
reference and change bits are not subject to a
protection exception. These bits can be accessed
regardless of the state of the addressed page.
Condition Code: The code remains unchanged.
Program Exceptions:
Addressing (operand 2)
Privileged Operation
INSERT PSW KEY
I PK
[S]
IB20B I
111111111111111111
o
16
31
The four-bit PSW-key, bits 8-11 of the current
PSW, is inserted in bit positions 24-27 of general
register 2, and bits 28-31 of that register are set to
zeros. Bits 0-23 of general register 2 remain
unchanged.
Bits 16-31 of the instruction are ignored.
Resulting Condition Code: The code remains
unchanged.
Program Exceptions:
Privileged Operation
INSERT STORAGE KEY
[RR]
109 1
o
8
12
15
The· storage key associated with the page that is
addressed by the contents of the general register
Chapter 10. Control Instructions
10-5
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