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pending interruption
(see
interruption, pending)
PER (program-event recording)
4-8
address, wraparound
4-11
code and address
4-10
assigned storage locations for
3-10
ending address
4-9
events
4-8
general-register-alteration
4-12
instruction-fetching
4-11
masks
4-9
priority of interruptions
4-10
program-interruption condition
storage alteration
4-11
storage-area designation
4-11
successful branching
4-11
general-register masks
4-9
mask (in PSW)
4-4
starting address
4-9
point of damage
11-7
point of interruption
5-6
for machine check
11-7
postnormalization
9-2
power controls
13-4
power-on reset
4-24
precision (floating-point)
preferred sign codes
8-1
prefetching
for I/O
12-30
of instructions
5-9
pre normalization
9-2
priority
(see
interruption)
privileged instructions
for control
10-1
for I/O
12-14
4-5
9-1
privileged-operation exception
problem state
4-5, 4-6
processor
(see
CPU)
program
6-14
check (channel status)
relation to storage size
event recording
(see
PER)
events
(see
PER events)
12,.53
3-3
exceptions
6-10
execution
5-1
initial loading of
4-24
interruption
6-10
for I/O instructions
12-27
priority
6-16
mask (in PSW)
4-4, 4-6
validity bit for
11-10
reset
4-23
status word
(see
PSW)
program-controlled interruption (PCI)
channel status
12-52
flag
12-29
protection
check (channel status)
12-54
caused by disconnected page
exception
6-14
as an access exception
6-15
of storage
(see
storage protection)
3-5
PSW (program-status word)
2-2, 4-2
assigned storage locations for
3-9
BC-mode
4-6
EC-mode
4-4
exceptions associated with
6-6
format error
6-6
in initial program loading
4-24
6-14
12-34
PSW
(continued)
assigned storage locations
in program execution
5-5
validity bits for
11-10
PSW key
r
in PSW
4-4, 4-6
used as access key
validity bit for
3-7
11-10
R field of instruction
5-3
range, floating-point
9-1
rate control
13-4
read (I/O command)
12-36
read backward (I/O command)
real storage
3-4
recovery
condition
11-5
system
11-9
mask bit for
11-12
redundancy
11-1
reference
bit
3-4
recording
3-8
sequence for storage
5-8
instructions
5-9
operands
5-10
page descriptions
5-9
single-access
5-11
register
base-address
2-2
control
2-3
designation of
5-3
floating-point
2-3
general
2-2
index
2-2
J
save areas
3-10, 11-11
validation
11-3
validity bits for
11-11
remote operating stations
13-1
report masks
11-12
3-12
12-36
repressible machine-check condition
11-5
RESET REFERENCE BIT (RRB) instruction
resets
4-21
effect on CPU state
4-2
effect on time-of-day clock
4-16
I/O
12-10
resolution
of clock comparator
4-18
of CPU timer
4-19
of interval timer
4-20
of time-of-day clock
4-16
restart
effect on CPU state
4-2
interruption
6-18
key
13-4
result operand
5-2
RETRIEVE STATUS AND PAGE (RSP)
instruction
10-8
retry
CPU
11-2
I/O command
12-39
rounding (decimal)
8-10
RR instruction format
5-2
RS instruction format
5-2
running (of time-of-day clock)
4-16
RX instruction format
5-2
10-8
Index
X-9
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