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Programming
Notes
1. The instruction MOVE LONG may be used for
clearing storage by setting the padding byte to
zero and the second-operand length to zero.
However, the stores associated with this
clearing may be multiple-access stores and
should not be used to clear an area if the
possibility exists that a channel or another CPU
will attempt to access and use the area as soon
as it appears to be zero.
2. The program should avoid specification of a
length for either operand which would result in
an addressing exception. Addressing (and also
protection) exceptions may result in termination
of the entire operation, not just the current unit
of operation. The termination may be such
that the contents of all result fields are
unpredictable; in the case of MVCL, this
includes the condition code and the two
even-odd general-register pairs, as well as the
first-operand location in main storage. The
following are situations that have actually
occurred on one or more models.
a.
When a protection exception occurs on a
2,048-byte block of a first operand which is
several blocks in length, stores to the
protected block are suppressed. However,
the move continues into the subsequent
blocks of the first operand, which are not
protected. Similarly, in the case of
reconfigurable storage, an addressing
exception on a block does not necessarily
suppress processing of subsequent blocks
which are addressable.
b. The model may update the general registers
only when an IIO interruption occurs or
when a program interruption occurs which
is required to nullify or suppress. Thus, if
after a move into several blocks of the first
operand, an addressing or protection
exception occurs, the registers remain
unchanged.
3. When the first-operand length is zero, the
operation consists in setting the condition code
and setting the high-order bytes of registers R
1
and R2 to zero.
4. When the contents of the Rl and R2 fields are
the same, the operation proceeds the same way
as when two distinct pairs of registers having
the same contents are specified. Condition
code 0 is set.
S.
The following is a detailed description of those
cases in which movement takes place, that is,
7-24
IBM 4300 Processors Principles of Operation
where destructive overlap does not exist.
Depending on whether the second operand
wraps around from location 16,777,215 to
location 0, movement takes place in the
following cases:
a.
When the second operand does not wrap
around, movement is performed if the
leftmost byte of the first operand coincides
with or is to the left of the leftmost byte of
the second operand, or if the leftmost byte
of the first operand is to the right of the
rightmost second-operand byte participating
in the operation.
b. When the second operand wraps around,
movement is performed if the leftmost byte
of the first operand coincides with or is to
the left of the leftmost byte of the second
operand, and if the leftmost byte of the
first operand is to the right of the rightmost
second-operand byte participating in the
operation.
The rightmost second-operand byte is
determined by using the smaller of the
first-operand and second-operand lengths.
When the second-operand length is one or
zero, destructive overlap cannot exist.
6. Special precautions must be taken if MOVE
LONG is made the target of EXECUTE. See
the programming note concerning interruptible
instructions under EXECUTE.
7. Since the execution of MOVE LONG is
interruptible, the instruction cannot be used for
situations where the program must rely on
uninterrupted execution of the instruction or on
the interval timer not being updated during the
execution of the instruction. Similarly, the
program should normally not let the first
operand of MOVE LONG include the location
of the instruction since the new contents of the
location may be interpreted for a resumption
after an interruption, or the instruction may be
refetched without an interruption.
8. Further programming notes concerning
interruptible instructions are included in the
section "Interruptible Instructions" in Chapter
5, "Program Execution.
II
MOVE NUMERICS
MVN
°1(L,Bl),02(B2)
[SS]
/
/
1011
L
I
B 1
I
°1
I
B2
I
~iJ
/
0
8
16
20
32
36
47
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