Table of Contents
Advertisement
Table 2-1 M•CORE Instruction Set (Continued)
Mnemonic
SEXTB
SEXTH
ST.[BHW]
STM
STQ
STOP
SUBC
SUBU
SUBI
SYNC
TRAP
TST
TSTNBZ
WAIT
XOR
XSR
XTRB0
XTRB1
XTRB2
XTRB3
ZEXTB
ZEXTH
2.8 M•CORE Bus Interface
The M•CORE bus is a synchronous pipelined interface. Signals driven on this bus are
required to meet the set up and hold time relative to the falling and rising edges of the
bus clock.
The M•CORE architecture supports byte, half-word, and word operands, allowing
access to 8-,16-, and 32-bit data ports through the use of synchronous cycles con-
trolled by the size outputs (TSIZ0, TSIZ1).
M•CORE bus interface features are summarized below.
• 32-bit address bus with transfer size indication
• 32-bit data bus
• Signals referenced to both the rising and falling edges of the bus clock
• Only aligned transfers allowed
• M•CORE is the only bus master; no arbitration support
• 32-bit fixed port size
2.8.1 Bus Characteristics
The bus transfers information between the M•CORE and external memory or a
peripheral device via the external and internal bus interfaces. The M•CORE port size
is fixed at 32 bits. External devices can accept or provide eight or 16 bits in parallel
and must follow the handshake protocol described in this section. The number of bits
accepted or provided during a bus transfer is defined as the transfer size. The
M•CORE uses the address bus to specify the address for the transfer and the data
bus to transfer the data. Control and attribute signals indicate the beginning and type
MOTOROLA
2-8
All manuals and user guides at all-guides.com
Freescale Semiconductor, Inc.
Sign-Extend Byte
Sign-Extend Halfword
Store
Store Multiple Registers
Store Register Quadrant
Stop
Subtract with C Bit
Subtract
Subtract Immediate
Synchronize
Trap
Test Operands
Test for No Byte Equal Zero
Wait
Exclusive OR
Extended Shift Right
Extract Byte 0
Extract Byte 1
Extract Byte 2
Extract Byte 3
Zero-Extend Byte
Zero-Extend Halfword
INTEGER CPU
For More Information On This Product,
Go to: www.freescale.com
Description
REFERENCE MANUAL
MMC2001
Advertisement
Table of Contents
