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RSCR — Reset Source/Chip Configuration Register
31
30
29
28
R
0
0
0
0
W
RESET:
15
14
13
12
R
0
0
0
0
W
RESET:
* = See bit description
CKOS — CLKOUT Source
This bit controls the clock source for the CLKOUT pin. Modify this pin only when the
clock output has been disabled. This bit is cleared by POR, a qualified assertion of
the RSTIN pin, or a qualified assertion of the LVRSTIN pin.
0 = CLKOUT source is HI_REFCLK
1 = CLKOUT source is LOW_REFCLK
CKOE — CLKOUT Enable
This bit controls the drive enable for the CLKOUT pin. It is cleared by POR, a qualified
assertion of the RSTIN pin, or a qualified assertion of the LVRSTIN pin.
0 = CLKOUT is disabled and forced to the low state
1 = CLKOUT is enabled and driven from the source selected by CKOS
LVRSTIN — LVRSTIN Pin
This bit is set when the LVRSTIN pin is asserted to reset the MMC2001. It is not
affected by the other reset sources. When the POR bit is set, however, this bit is
undefined. This bit is cleared by writing to RSCR.
RST — RSTIN Pin
This bit is set when the RSTIN pin is asserted and qualified by the four-cycle qualifier
to reset the MMC2001. It is not affected by the other reset sources. When the POR bit
is set, however, this bit is undefined. It is cleared by writing to RSCR.
POR — Power-On Reset
This bit is set when an internal POR occurs to reset the chip. It is not affected by the
other reset sources. It is cleared by writing to RSCR.
WDR — Watchdog Reset
This bit is set when the watchdog timer expires. It is cleared by POR, a qualified
assertion of the RSTIN pin, a qualified assertion of the LVRSTIN pin, or by writing to
RSCR.
MOTOROLA
C-6
All manuals and user guides at all-guides.com
Freescale Semiconductor, Inc.
27
26
25
24
0
0
0
0
11
10
9
8
0
0
CKOS CKOE
0*
0*
Figure C-6 Reset Source Register
PROGRAMMING REFERENCE
For More Information On This Product,
Go to: www.freescale.com
23
22
21
20
0
0
0
0
7
6
5
4
LVRST
0
0
0
0
10001000
19
18
17
16
0
0
0
0
3
2
1
0
RST
POR
WDR
IN
*
*
*
0*
MMC2001
REFERENCE MANUAL
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