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Figure 16-8 OnCE Trace Logic Block Diagram
16.9.1 Trace Counter (OTC)
The trace counter (OTC) allows more than one instruction to be executed in real time
before the device returns to debug mode. This feature helps the software developer
debug sections of code that are time-critical. The trace counter also enables the user
to count the number of instructions executed in a code segment.
The OTC is a 16-bit counter that can be read, written, or cleared through the OnCE
serial interface. If N instructions are to be executed before entering debug mode, the
trace counter should be loaded with N–1. N must not equal zero unless the sequential
breakpoint control capability described in 16.6.2 OnCE Control Register (OCR) is
being used. In this case a value of zero (indicating a single instruction) is allowed.
The trace counter is cleared by hardware reset.
16.9.2 Trace Operation
The following steps initiate trace mode operation:
1. Load the counter with a value. This value must be non-zero, unless the sequential
breakpoint control capability described in 16.6.2 OnCE Control Register (OCR) is
being used. In this case a value of zero (indicating a single instruction) is allowed.
2. Initialize the program counter and instruction register in the CPUSCR with values
corresponding to the start location of the instruction(s) to be executed real-time.
3. Set the TME bit in the OCR.
4. Release the processor from debug mode by executing the appropriate command
issued by the external command controller.
When debug mode is exited, the counter is decremented after each execution of an
instruction. Interrupts can be serviced, and all instructions executed (including inter-
rupt services) will decrement the trace counter.
MMC2001
REFERENCE MANUAL
All manuals and user guides at all-guides.com
Freescale Semiconductor, Inc.
Trace Counter
COUNT=0
OnCE™ DEBUG MODULE
For More Information On This Product,
Go to: www.freescale.com
End of Instruction
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DEC
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ISTRACE
MOTOROLA
16-15
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