Fast Interrupt Pending Register (Fipnd); Interrupt Request Input Assignments; Fast Interrupt Pending Register - Motorola Freescale Semiconductor M-Core MMC2001 Reference Manual

10.2.5 Fast Interrupt Pending Register (FIPND)

Access the 32-bit read-only fast interrupt pending register with 32-bit loads only.
FIPND — Fast Interrupt Pending Register
31 30 29 28
FP31 FP30 FP29 FP28
RESET:
0 0 0 0
15 14 13 12
FP15 FP14 FP13 FP12
RESET:
0 0 0 0
Figure 10-5 Fast Interrupt Pending Register
FPx — Fast Interrupt Pending Flag x
This bit indicates a pending fast interrupt request from the corresponding interrupt
source.
0 = No request
1 = Interrupt request pending
When a fast interrupt enable flag is set and the corresponding interrupt line is
asserted, the interrupt controller will assert a fast interrupt request (FINT CPU input).
The fast interrupt pending flags reflect the interrupt input lines which are currently
enabled to generate a fast interrupt and are asserted.

10.2.6 Interrupt Request Input Assignments

The assignment of bits within the interrupt registers to interrupt sources is shown in
Table 10-2.
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27 26 25 24
FP27 FP26 FP25 FP24
0 0 0 0
11 10 9 8
FP11 FP10 FP9 FP8
0 0 0 0
INTERRUPT CONTROLLER
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23 22 21 20
FP23 FP22 FP21 FP20
0 0 0 0
7 6 5 4
FP7 FP6 FP5 FP4
0 0 0 0
10000010
19 18 17 16
FP19 FP18 FP17 FP16
0 0 0 0
3 2 1 0
FP3 FP2 FP1 FP0
0 0 0 0
MOTOROLA
10-5