Peripheral Module Interface Operation; Peripheral Module Address Assignment; Mmc2001 Address Map - Motorola Freescale Semiconductor M-Core MMC2001 Reference Manual

Table of Contents

3.3 Peripheral Module Interface Operation

Interface requirements for peripherals are defined to simplify the hardware interface

implementation while providing a reasonable and extendable software model. The fol-

lowing requirements are currently defined (others may be added in the future):

• A given peripheral device appears only in the 4-Kbyte region(s) allocated to it.

• For on-chip devices, registers are defined to be 16 or 32 bits wide. For registers

that do not implement all 32 bits, the unimplemented bits return zero when read,

and writes to unimplemented bits have no effect. In general, unimplemented bits

should be written to zero to ensure future compatibility.

• All peripherals define the exact results for 32-bit, 16-bit, and 8-bit accesses.

These may vary according to individual peripheral definitions. In any event, mis-

aligned accesses are not supported, nor is bus sizing performed for accesses to

registers smaller than the access size.

The register maps of all peripheral devices for MMC2001 are located on 4096-byte

boundaries. Table 3-2 defines the address assignment for the on-chip components.

Address Range (Hex)

00000000 – 0003FFFF

00040000 – 000FFFFF

00100000 – 0FFFFFFF

10000000 – 10000FFF

10001000 – 10001FFF

10002000 – 10002FFF

10003000 – 10003FFF

10004000 – 10004FFF

10005000 – 10005FFF

10006000 – 10006FFF

10007000 – 10007FFF

10008000 – 10008FFF

10009000 – 10009FFF

1000A000 – 1000AFFF

1000B000 – 1FFFFFFF

20000000 – 2FFFFFFF

30000000 – 30007FFF

30008000 – 3000FFFF

30100000 – 40000000

MOTOROLA

3-2

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Table 3-2 MMC2001 Address Map

Use

On-Chip ROM Array

ROM Echoes

Not Used