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A.4.4 ISPI Timing Specifications
Num
Operating Frequency (SCLK)
51
Cycle Time
Enable Lead Time
52
PHA=0
PHA=1
Enable Lag Time
53
PHA=0
PHA=1
54
Clock (SCLK) High Time
55
Clock (SCLK) Low Time
56
Data Setup Time (Inputs)
57
Data Hold Time (Inputs)
58
Access Time Slave
59
Disable Time (Hold Time)
60
Data Valid (After Enable Edge)
61
Data Hold Time (Output) (After Enable Edge)
Rise Time (20% V
62
Manual/Interval Mode
Slave Mode
Fall Time (20% V
63
Manual/Interval Mode
Slave Mode
64
Sequential Transfer Delay
NOTES:
1. Signal depends on software in interval mode.
MOTOROLA
A-6
All manuals and user guides at all-guides.com
Freescale Semiconductor, Inc.
Table A-7 ISPI Timing Specifications
Characteristic
to 70% V
, C
= 20pF)
DD
DD
L
to 70% V
, C
= 20pF)
DD
DD
L
1
ELECTRICAL CHARACTERISTICS
For More Information On This Product,
Go to: www.freescale.com
Symbol
Min
Max
f
DC
1/8
op(s)
t
8
1024
cyc
t
1
lead
1
t
1
lag
1
t
4
512
w(SCKH)
t
4
512
w(SCKL)
t
8
su
t
8
h
t
1
a
t
—
dis
t
—
v(s)
t
0
ho
t
—
rs
—
t
0
fs
0
t
1
bt
REFERENCE MANUAL
Unit
CLK
CLK
—
SCLK
—
1
SCLK
1
CLK
CLK
—
ns
—
ns
—
SCLK
1
SCLK
5
ns
—
ns
10
ns
10
10
ns
10
—
SCLK
MMC2001
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