Uart Transmitter Register (Utx) - Motorola Freescale Semiconductor M-Core MMC2001 Reference Manual

FRMERR — Frame Error
When set, this read-only bit indicates that the current character had a framing error
(missing stop bit). The data is possibly corrupted. This bit is updated for each charac-
ter read from the FIFO.
Every attempt is made to allow the receiver to correctly interpret data following a
character marked as having a framing error. (This includes ignoring the start bit vali-
dation logic, if appropriate.) However, if the transmitted data includes two stop bits,
and both stop bits are incorrect, then the second stop bit will be interpreted as the
start bit of the next character.
0 = Character has no framing error
1 = Character has a framing error
At reset, this bit is cleared to zero.
BRK — Break Detect
When set, this read-only bit indicates that the current character was detected as a
break. The data bits are all zero and the stop bit is also zero. The frame error bit is
always set when this bit is set. If odd parity is selected, parity error will also be set
when this bit is set. This bit is valid for each character read from the FIFO.
0 = Character is not a break character
1 = Character is a break character
At reset, this bit is cleared to zero.
PRERR — Parity Error
When set, this read-only bit indicates that the current character was detected with a
parity error. The data is possibly corrupted. This bit is updated for each character
read from the FIFO. While parity is disabled, this bit always reads zero.
0 = No parity error detected for data in RX DATA field
1 = Parity error detected for data in RX DATA field
At reset, this bit is cleared to zero.
RX DATA — Received Data
These read-only bits are the received character. In 7-bit mode, the MSB is forced to
zero. In 8-bit mode, all bits are active.

11.4.2 UART Transmitter Register (UTX)

The UART transmitter register is used by the host to write the data to be transmitted.
The low byte is write-only. When this register is read, bits TX[15:8] always return zero,
and TX[7:0] is not driving the bus. The TX register is echoed to 16-word addresses in
order to support filling the transmit FIFO with the store register quadrant (stq) instruc-
tion.
MOTOROLA UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER MODULE
11-8
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MMC2001
REFERENCE MANUAL