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–G–
General-purpose I/O 13-1
General-purpose registers 2-3
Glitch suppression, KPP 14-7
GND pin 4-9
GO bit 16-7, C-46
GPIO 13-1
Ground 4-9
–H–
Hardware Debug Request Occurrence bit 16-11, C-50
HDB bit 7-7, 7-12, C-21
HDRO bit 16-11, C-50
HI_REFCLK 8-1
High Data Bus bit 7-7, 7-12, C-21
–I–
IDR signal 16-5
IDRE bit 16-9, C-48
Ignore RTS bit 11-2, 11-12, C-41
IN bits 10-3, C-2
Infrared interface 11-4
Infrared Interface Enable bit 11-11, C-39
Instruction
address FIFO buffer 16-20
Register 16-18, C-52
timing 2-2
INT signals 4-6
Internal
Debug Request Enable bit 16-9, C-48
debug request input 16-5
RAM Supervisor Protect bit 7-12, C-21
ROM
disable 4-4
Supervisor Protect bit 7-12, C-21
ROM disable 7-2
Interrupt
controller 10-1
in low-power modes 8-5
programming model 10-2
Request Enable bit 15-4, C-24
Request flag 12-9, C-34
source assignments 10-5
Source bits 10-3, C-2
Source Register 10-2, C-2
Interrupt Request Enable bit 12-6, C-32
INTERVAL COUNT field 12-8, C-33
Interval mode 12-3, 12-10
serial peripheral interface. See ISPI
Interval Mode Enable bit 12-8, C-33
Interval timer. See PIT
INTSRC 10-2, C-2
IR 16-18, C-52
IREN bit 11-11, C-39
IRQ bit 12-9, C-34
IRQ EN bit 15-4, C-24
MMC2001
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IRQ_EN bit 12-6, C-32
IRTS bit 11-2, 11-12, C-41
ISPI 12-1
block diagram 12-1
clock 12-4
Control Register 12-5, C-31
Data Register 12-5, C-30
Debug mode and 12-11
Enable bit 12-6, C-31
enable signal 12-4
general-purpose output 12-4
Interval Control Register 12-8, C-33
interval mode 12-3, 12-10
low-power modes and 8-5
low-power operation 12-11
manual mode 12-2, 12-9
operation 12-1
programming model 12-4, C-30
signals 12-3
slave mode 12-3, 12-10
Status Register 12-8, C-34
timing specifications A-6
ITADR 9-12, 9-16, C-13
ITCSR 9-14, C-11
ITDR 9-12, 9-15, C-12
ITIE bit 9-13, 9-14, C-12
ITIF bit 9-13, 9-14, C-12
IVL_EN bit 12-8, C-33
–J–
JTAG Test Access Port 16-1
–K–
KCDD bits 14-5, C-15
KCO bits 14-3, C-14
KDDR 14-5, C-15
KDIE bit 14-4, C-14
KDSC bit 14-4, C-15
Key Depress Interrupt Enable bit 14-4, C-14
Key Depress Synchronizer Clear bit 14-4, C-15
Key Release Interrupt Enable bit 14-4, C-14
Keypad
Column Data Direction bits 14-5, C-15
Column Strobe Open-Drain Enable bits 14-3, C-14
Control Register 14-2, C-14
Data Direction Register 14-5, C-15
Data Register 14-5, C-15
Key Depress bit 14-3, 14-4, C-15
Key Release bit 14-3, 14-4, C-15
Row Data Direction bits 14-5, C-15
Row Enable bits 14-3, C-14
Status Register 14-3, C-14
Keypad port. See KPP
KPCR 14-2, C-14
KPDR 14-5, C-15
KPKD bit 14-3, 14-4, C-15
KPKR bit 14-3, 14-4, C-15
MOTOROLA
I-3
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