Timer/Reset Module; Overview; Timer/Reset Programming Model; Timer/Reset Module Address Map - Motorola Freescale Semiconductor M-Core MMC2001 Reference Manual

9.1 Overview

The timer/reset module contains the following timer submodules: the time-of-day with
alarm (TOD), the interval timer (PIT), and the watchdog timer (WD). In addition, this
module contains a reset source/chip configuration register.

9.2 Timer/Reset Programming Model

Table 9-1 shows the timer/reset module address map. These registers are described
in the subsections that describe each submodule.
Table 9-1 Timer/Reset Module Address Map
Address
10001000
10001004
10001008 Time-of-Day Seconds Register (TODSR)
1000100C
10001010
10001014
10001018
1000101C
10001020
10001024
10001028
1000102C
1000102E
to
10001FFF
10002000
to
10002FFF
MMC2001
REFERENCE MANUAL
All manuals and user guides at all-guides.com
Freescale Semiconductor, Inc.
SECTION 9

TIMER/RESET MODULE

Use
Reset Source/Chip Configuration Register (RSCR)
Time-of-Day Control/Status Register (TODCSR)
Time-of-Day Fraction Register (TODFR)
Time-of-Day Seconds Alarm Register (TODSAR)
Time-of-Day Fraction Alarm Register (TODFAR)
Reserved
Watchdog Control Register (WCR)
Watchdog Service Register (WSR)
Interval Timer Control/Status Register (ITCSR)
PIT Data Register (ITDR)
PIT Alternate Data Register (ITADR)
Reserved
Not Used (Access causes transfer error)
TIMER/RESET MODULE
For More Information On This Product,
Go to: www.freescale.com
Access
Supervisor Only
Supervisor Only
Supervisor Only
Supervisor Only
Supervisor Only
Supervisor Only
Supervisor Only
Supervisor Only
Supervisor Only
Supervisor Only
Supervisor Only
Supervisor Only
Supervisor Only
Not Applicable
MOTOROLA
9-1