Signal Descriptions; M•Core Bus Signals - Motorola Freescale Semiconductor M-Core MMC2001 Reference Manual

2.8.3 Signal Descriptions

Table 2-2 lists and describes the bus interface signals. More detailed descriptions
can be found in subsequent sections. Signal direction is relative to the M•CORE.
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2-10
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ADDR[31:0]
32
R/W
1
TSIZ[1:0]
2
TC[2:0]
3
TREQ
1
TBUSY
1
DATA[31:0]
32
TA
1
TEA
1
ABORT
1
DBGACK
1
LPMD[1:0]
2
Figure 2-5 M•CORE Bus Signals
INTEGER CPU
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Address and
Transfer
Attributes
Transfer Request
Transfer Busy
Data
Transfer
Termination/
Status
Debug Acknowledge
Power Management
REFERENCE MANUAL
MMC2001