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BLO
If C = 1, then (PC) + $0002 + Rel ⇒ PC
Operation:
For unsigned values, if (Accumulator) < (Memory), then branch
Description:
If BLO is executed immediately after execution of CBA, CMPA, CMPB,
CMPD, CPX, CPY, SBA, SUBA, SUBB, or SUBD, a branch occurs if and
only if the unsigned binary number in the accumulator is less than the
unsigned binary number in memory. Generally not useful after INC/DEC,
LD/ST, TST/CLR/COM because these instructions do not affect the C
status bit.
See
Condition Codes and Boolean Formulas:
S
–
None affected.
Addressing Modes, Machine Code, and Execution Times:
Source Form
BLO rel8
Notes:
1. PPP/P indicates this instruction takes three cycles to refill the instruction queue if the branch is taken and one
program fetch cycle if the branch is not taken.
Branch
Test
Mnemonic
r>m
BGT
r≥m
BGE
r=m
BEQ
r≤m
BLE
r<m
BLT
r>m
BHI
r≥m
BHS/BCC
r=m
BEQ
r≤m
BLS
r<m
BLO/BCS
Carry
BCS
Negative
BMI
Overflow
BVS
r=0
BEQ
Always
BRA
MOTOROLA
6-38
Branch if Lower
(Same as BCS)
3.7 Relative Addressing Mode
X
H
I
N
Z
–
–
–
–
–
Address Mode
REL
Opcode
Boolean
⊕
Z + (N
2E
V) = 0
⊕
2C
N
V = 0
27
Z = 1
⊕
Z + (N
2F
V) = 1
⊕
2D
N
V = 1
C + Z = 0
22
24
C = 0
27
Z = 1
C + Z = 1
23
25
C = 1
25
C = 1
2B
N = 1
29
V = 1
27
Z = 1
20
—
INSTRUCTION GLOSSARY
for details of branch execution.
V
C
–
–
Object Code
25 rr
Complementary Branch
Test
Mnemonic
r≤m
BLE
r<m
BLT
r≠m
BNE
r>m
BGT
r≥m
BGE
r≤m
BLS
r<m
BLO/BCS
r≠m
BNE
r>m
BHI
r≥m
BHS/BCC
No Carry
BCC
Plus
BPL
No Overflow
BVC
r≠0
BNE
Never
BRN
BLO
Cycles
Access Detail
1
3/1
PPP/P
Opcode
Comment
2F
Signed
2D
Signed
26
Signed
2E
Signed
2C
Signed
23
Unsigned
25
Unsigned
26
Unsigned
22
Unsigned
24
Unsigned
24
Simple
2A
Simple
28
Simple
26
Simple
21
Unconditional
CPU12
REFERENCE MANUAL
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