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10.5.1.3 CSP1FL Control Bit
Configures CSP1 to occupy all of the 64-Kbyte memory map that is not used by a high-
er-priority resource. If CSP1FL = 0, CSP1 is mapped to the area from $8000 to $FFFF.
CSP1 has the lowest access priority except for external memory space that is not as-
sociated with any chip select.
10.5.1.4 CSPA21 Control Bit
Logic one causes CSP0 and CSP1 to be controlled by the ADDR21 signal. CSP1 is
active when ADDR21 = 0, and CSP0 is active when ADDR21 = 1. When CSPA21 is
one, the CSP1FL bit is ignored and both CSP0 and CSP1 are active in the region
$8000–$FFFF. When CSPA21 is zero, CSP0 and CSP1 operate independently from
the value of the ADDR21 signal.
10.5.1.5 STRP0A:STRP0B Control Field
These two bits program an extra delay into accesses to the CSP0 area of memory.
The choices are 0, 1, 2, or 3 E-cycles in addition to the normal one cycle for un-
stretched accesses. This allows use of slow external memory without slowing down
the entire system.
10.5.1.6 STRP1A:STRP1B Control Field
These two bits program an extra delay into accesses to the CSP1 area of memory.
The choices are 0, 1, 2, or 3 E-cycles in addition to the normal one cycle for un-
stretched accesses. This allows use of slow external memory without slowing down
the entire system.
When enabled, CSP0 is active for the memory space from $8000 through $FFFF. This
includes the program overlay space ($8000–$BFFF) and the unpaged 16-Kbyte block
from $C000 through $FFFF. This configuration can be used if there is a single program
memory device (up to four Mbytes) in the system.
If CSP1 is also enabled and the CSPA21 bit is set, CSP1 can be used to select the
first 128 16-Kbyte pages (two Mbytes) in the program overlay expansion memory
space while CSP0 selects the higher numbered program expansion pages and the
unpaged block from $C000 through $FFFF. Recall that the external memory device
cannot distinguish between an access to the $C000 to $FFFF space and an access to
$8000–$BFFF in the 255th page (PPAGE = $FF) of the program overlay window.
10.5.2 Data Expansion Chip Select Controls
The data chip select (CSD) has four associated control bits.
10.5.2.1 CSDE Control Bit
Enables (1) or disables (0) the CSD chip select. The default is disabled.
MOTOROLA
10-6
MEMORY EXPANSION
CPU12
REFERENCE MANUAL
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