Motorola HC12 Refrence Manual page 371

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Major improvements that result from this new approach are:
Stack pointer can be used as an index register in all indexed operations
Program counter can be used as index register in all but auto inc/dec modes
Accumulator offsets allowed using A, B, or D accumulators
Automatic pre- or post-, increment or decrement (by –8 to +8)
5-bit, 9-bit, or 16-bit signed constant offsets
16-bit offset indexed-indirect and accumulator D offset indexed-indirect
The change completely eliminates pages three and four of the M68HC11 opcode
map and eliminates almost all instructions from page two of the opcode map. For off-
sets of +0 to +15 from the X index register, the object code is the same size as it was
for the M68HC11. For offsets of +0 to +15 from the Y index register, the object code is
one byte smaller than it was for the M68HC11.
Table A-5
summarizes M68HC12 indexed addressing mode capabilities.
shows how the postbyte is encoded.
B.5.1 Constant Offset Indexing
The CPU12 offers three variations of constant offset indexing in order to optimize the
efficiency of object code generation.
The most common constant offset is zero. Offsets of 1, 2,...4 are used fairly often, but
with less frequency than zero.
The 5-bit constant offset variation covers the most frequent indexing requirements by
including the offset in the postbyte. This reduces a load accumulator indexed instruc-
tion to two bytes of object code, and matches the object code size of the smallest
M68HC11 indexed instructions, which can only use X as the index register. The
CPU12 can use X, Y, SP, or PC as the index reference with no additional object code
size cost.
The signed 9-bit constant offset indexing mode covers the same positive range as the
M68HC11 8-bit unsigned offset. The size was increased to nine bits with the sign bit
(ninth bit) included in the postbyte, and the remaining 8-bits of the offset in a single
extension byte.
The 16-bit constant offset indexing mode allows indexed access to the entire normal
64-Kbyte address space. Since the address consists of 16 bits, the 16-bit offset can
be regarded as a signed (–32,768 to +32767) or unsigned (0 to 65,535) value. In 16-
bit constant offset mode, the offset is supplied in two extension bytes after the opcode
and postbyte.
CPU12
REFERENCE MANUAL
M68HC11 TO M68HC12 UPGRADE PATH
Table A-3
MOTOROLA
B-7

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