Table of Contents
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Index manipulation 5-19
Interrupt 5-18
Jump and subroutine 5-17
Load and store 5-1
Loop primitives 5-16
Maximum and minimum 5-11
Move 5-3
Multiplication and division 5-7
Multiply and accumulate 5-11
Pointer and index calculation 5-20
Shift and rotate 5-8
Sign extension 5-2
Stacking 5-20
Stop and wait 5-21
Table interpolation 5-12
Transfer and exchange 5-2
TYS instruction 6-212
Unary branches 5-13
Unimplemented opcode trap 5-18, 6-205,
7-1 to 7-2
Unsigned branches 5-13
Unsigned multiplication 5-7
Unstack 16-bit data cycle 6-7
Unstack 8-bit data cycle 6-6
Unweighted rule evaluation 6-166, 9-5,
9-13 to 9-15, 9-17 to 9-20, 9-22, 9-29
V status bit 2-4, 6-50 to 6-51, 6-59, 6-120 to 6-121,
6-166 to 6-169, 6-184
Vector fetch cycle 6-7
Vectors, exception 7-1, 7-6
WAI instruction 5-21, 6-213
WAV instruction 5-9, 5-11, 6-214, 9-1, 9-6,
9-22 to 9-24, 9-26, 9-29
Wavr pseudoinstruction 9-23 to 9-24, 9-26
Weighted average 6-214
Weighted rule evaluation 6-168, 9-5, 9-13 to 9-15,
9-17 to 9-20, 9-22, 9-29
Word moves 6-145
Write PPAGE cycle 6-5
Write 16-bit data cycle 6-6
Write 8-bit data cycle 6-6
X mask bit 2-3, 6-90, 6-162, 6-177, 6-189, 6-198,
6-203, 6-213
XGDX instruction 6-215
XGDY instruction 6-216
MOTOROLA
I-8
U
V
W
X
Z status bit 2-4, 6-29, 6-42, 6-81 to 6-84,
6-100 to 6-101, 6-106, 6-116, 6-139 to 6-140,
6-142 to 6-143
Zero-page addressing 3-3
Z
CPU12
REFERENCE MANUAL
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Table of Contents
