Motorola HC12 Refrence Manual page 294

Table 8-2 BDM Commands Implemented in Hardware
Command Opcode (Hex)
BACKGROUND
READ_BD_BYTE
1
STATUS
READ_BD_WORD
READ_BYTE
READ_WORD
WRITE_BD_BYTE
2
ENABLE_ FIRMWARE
WRITE_BD_WORD
WRITE_BYTE
WRITE_WORD
:
NOTES
1. STATUS command is a specific case of the READ_BD_BYTE command.
2. ENABLE_FIRMWARE is a specific case of the WRITE_BD_BYTE command.
The CPU must be in background mode to execute commands that are implemented
in the BDM ROM. The CPU executes code from the ROM to perform the requested
operation. These commands are shown in
The host controller must wait 150 cycles for a non-intrusive BDM command to execute
before another command can be sent. This delay includes 128 cycles for the maxi-
mum delay for a dead cycle.
BDM logic retains control of the internal buses until a read or write is completed. If an
operation can be completed in a single cycle, it does not intrude on normal CPU oper-
ation. However, if an operation requires multiple cycles, CPU clocks are frozen until
the operation is complete.
MOTOROLA
8-10
Data
90 None
E4 16-bit address
16-bit data out
E4 FF01,
0000 0000 (out)
FF01,
1000 0000 (out)
FF01,
1100 0000 (out)
EC 16-bit address
16-bit data out
E0 16-bit address
16-bit data out
E8 16-bit address
16-bit data out
C4 16-bit address
16-bit data in
C4 FF01,
1xxx xxxx(in)
CC 16-bit address
16-bit data in
C0 16-bit address
16-bit data in
C8 16-bit address
16-bit data in
DEVELOPMENT AND DEBUG SUPPORT
Description
Enter background mode (if firmware enabled).
Read from memory with BDM in map (may steal cycles
if external access) data for odd address on low byte,
data for even address on high byte.
READ_BD_BYTE $FF01. Running user code (BGND
instruction is not allowed).
READ_BD_BYTE $FF01. BGND instruction is allowed.
READ_BD_BYTE $FF01. Background mode active
(waiting for single wire serial command).
Read from memory with BDM in map (may steal cycles
if external access) must be aligned access.
Read from memory with BDM out of map (may steal cy-
cles if external access) data for odd address on low
byte, data for even address on high byte.
Read from memory with BDM out of map (may steal cy-
cles if external access) must be aligned access.
Write to memory with BDM in map (may steal cycles if
external access) data for odd address on low byte, data
for even address on high byte.
Write byte $FF01, set the ENBDM bit. This allows exe-
cution of commands which are implemented in firm-
ware. Typically, read STATUS, OR in the MSB, write
the result back to STATUS.
Write to memory with BDM in map (may steal cycles if
external access) must be aligned access.
Write to memory with BDM out of map (may steal cycles
if external access) data for odd address on low byte,
data for even address on high byte.
Write to memory with BDM out of map (may steal cycles
if external access) must be aligned access.
Table 8-3.
CPU12
REFERENCE MANUAL