Motorola HC12 Refrence Manual page 429

ABA instruction 6-8
Abbreviations for system resources 1-2
ABX instruction 6-9
ABY instruction 6-10
Accumulator direct indexed addressing mode 3-9
Accumulator offset indexed addressing mode 3-9
Accumulators 2-1, 5-8, 5-19
A 2-1, 3-5, 5-8, 6-8, 6-11, 6-13, 6-15 to 6-16,
6-20, 6-24, 6-35, 6-53, 6-57, 6-60, 6-63,
6-69 to 6-71, 6-73, 6-87, 6-90, 6-92 to 6-93,
6-97, 6-122, 6-124, 6-132, 6-134, 6-136,
6-139 to 6-140, 6-142 to 6-143, 6-146,
6-148, 6-151, 6-154, 6-157, 6-160, 6-167,
6-169, 6-171, 6-174, 6-177, 6-179 to 6-180,
6-185 to 6-186, 6-193, 6-196 to 6-204, 6-207
B 2-1, 3-5, 5-8, 6-8 to 6-10, 6-12, 6-14 to 6-15,
6-17, 6-21, 6-25, 6-36, 6-53, 6-58, 6-61, 6-64,
6-70 to 6-71, 6-74, 6-88 to 6-90,
6-92 to 6-93, 6-98, 6-123 to 6-124, 6-133,
6-137, 6-146, 6-149, 6-152, 6-155, 6-161,
6-172, 6-175, 6-177, 6-179, 6-181, 6-185,
6-187, 6-194, 6-196 to 6-197,
6-199 to 6-203, 6-208
D 2-1, 3-5, 5-8, 6-15, 6-22, 6-65, 6-70 to 6-71,
6-78 to 6-79, 6-81 to 6-86, 6-89 to 6-95,
6-124, 6-134, 6-138, 6-146, 6-157, 6-163,
6-185, 6-188, 6-195 to 6-196, 6-200,
6-202 to 6-203, 6-215 to 6-216
Indexed addressing 3-9
ADCA instruction 6-11
ADCB instruction 6-12
ADDA instruction 6-13
ADDB instruction 6-14
ADDD instruction 6-15
Addition instructions 5-3, 6-8 to 6-15
ADDR mnemonic 1-3
Addressing modes 3-1
Direct 3-3
Extended 3-3
Immediate 3-2
Indexed 2-2, 3-5
Inherent 3-2
Memory expansion 10-7
Relative 3-4
ANDA instruction 6-16
ANDB instruction 6-17
ANDCC instruction 6-18
ASL instruction 6-19
ASLA instruction 6-20
ASLB instruction 6-21
ASLD instruction 6-22
ASR instruction 6-23
CPU12
REFERENCE MANUAL
INDEX INDEX
A
ASRA instruction 6-24
ASRB instruction 6-25
Asserted 1-3
Automatic indexing 3-8
Automatic program stack 2-2
Background debugging mode 5-22, 8-6
BKGD pin 8-7 to 8-9
Commands 8-9 to 8-10
Enabling and disabling 8-6
Instruction 5-22, 6-31, 8-6
Registers 8-11
ROM 8-6
Serial interface 8-7 to 8-9
Base index register 3-6, 3-10
BCC instruction 6-26
BCLR instruction 6-27
BCS instruction 6-28
BEQ instruction 6-29
BGE instruction 6-30
BGND instruction 5-22, 6-31, 8-6
BGT instruction 6-32
BHI instruction 6-33
BHS instruction 6-34
Binary-coded decimal instructions 5-4, 6-8,
6-11 to 6-14, 6-69
Bit manipulation instructions 5-7, 6-27, 6-48, B-15,
C-1
Mask operand 3-11, 6-27, 6-48
Multiple addressing modes 3-11, 6-27, 6-48
Bit test instructions 5-7, 6-35 to 6-36, C-1
BITA instruction 6-35
BITB instruction 6-36
Bit-condition branches 5-16, 6-45, 6-47
BKGD pin 8-7 to 8-9
BLE instruction 6-37
BLO instruction 6-38
BLS instruction 6-39
BLT instruction 6-40
BMI instruction 6-41
BNE instruction 6-42
Boolean logic instructions 5-6
AND 6-16 to 6-18
Complement 6-62 to 6-64
Exclusive OR 6-87 to 6-88
Inclusive OR 6-151 to 6-153
Negate 6-147 to 6-149
BPL instruction 6-43
BRA instruction 6-44
Branch instructions 3-4, 4-4 to 4-5, 5-13, C-4
Bit-condition 4-4 to 4-5, 5-16, 6-45, 6-47
Long 4-4 to 4-5, 5-13, 6-104 to 6-121, B-13
B
MOTOROLA
I-1