Table of Contents
Advertisement
Both SWI and BGND store a return PC value (SWI on the stack and BGND in the
CPU12 TMP2 register), but this value is automatically incremented to point to the next
instruction after SWI or BGND. In order to resume execution where a breakpoint oc-
curred, the control program must preserve the breakpoint address rather than use the
incremented PC value.
The breakpoint logic generally uses match registers to determine when a break is tak-
en. Registers can be used to match the high and low bytes of addresses for single and
dual breakpoints, to match data for single breakpoints, or to do both functions. Use of
the registers is generally determined by control bit settings.
CPU12
REFERENCE MANUAL
DEVELOPMENT AND DEBUG SUPPORT
MOTOROLA
8-15
Advertisement
Table of Contents
