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Postbyte
Source Code
Code (xb)
Syntax
,r
rr0nnnnn
n,r
-n,r
n,r
111rr0zs
-n,r
111rr011
[n,r]
n,-r
n,+r
rr1pnnnn
n,r-
n,r+
A,r
111rr1aa
B,r
D,r
111rr111
[D,r]
3.8.1 5-Bit Constant Offset Indexed Addressing
This indexed addressing mode uses a 5-bit signed offset which is included in the in-
struction postbyte. This short offset is added to the base index register (X, Y, SP, or
PC) to form the effective address of the memory location that will be affected by the
instruction. This gives a range of
ister. Although other indexed addressing modes allow 9- or 16-bit offsets, those
modes also require additional extension bytes in the instruction for this extra informa-
tion. The majority of indexed instructions in real programs use offsets that fit in the
shortest 5-bit form of indexed addressing.
Examples:
LDAA
STAB
For these examples, assume X has a value of $1000 and Y has a value of $2000 be-
fore execution. The 5-bit constant offset mode does not change the value in the index
register, so X will still be $1000 and Y will still be $2000 after execution of these in-
structions. In the first example, A will be loaded with the value from address $1000. In
the second example, the value from the B accumulator will be stored at address $1FF8
($2000 – $8).
MOTOROLA
3-6
Table 3-2 Summary of Indexed Operations
5-bit constant offset n = –16 to +15
r can specify X, Y, SP, or PC
Constant offset (9- or 16-bit signed)
z-
0 = 9-bit with sign in LSB of postbyte(s)
1 = 16-bit
if z = s = 1, 16-bit offset indexed-indirect (see below)
r can specify X, Y, SP, or PC
16-bit offset indexed-indirect
rr can specify X, Y, SP, or PC
Auto pre-decrement/increment or Auto post-decrement/increment;
p = pre-(0) or post-(1), n = –8 to –1, +1 to +8
r can specify X, Y, or SP (PC not a valid choice)
+8 = 0111
...
+1 = 0000
-1 = 1111
...
-8 = 1000
Accumulator offset (unsigned 8-bit or 16-bit)
aa-
00 = A
01 = B
10 = D (16-bit)
11 = see accumulator D offset indexed-indirect
r can specify X, Y, SP, or PC
Accumulator D offset indexed-indirect
r can specify X, Y, SP, or PC
16 through +15 from the value in the base index reg-
–
0,X
8,Y
–
ADDRESSING MODES
Comments
rr; 00 = X, 01 = Y, 10 = SP, 11 = PC
-256 < n < 255
0 < n < 65,535
0 < n < 65,535
CPU12
REFERENCE MANUAL
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