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ADDD
(A : B) + (M : M+1) ⇒ A : B
Operation:
Description:
Adds the content of memory location M concatenated with the content of
memory location M +1 to the content of double accumulator D and plac-
es the result in D. Accumulator A forms the high-order half of 16-bit dou-
ble accumulator D; accumulator B forms the low-order half.
Condition Codes and Boolean Formulas:
S
–
Addressing Modes, Machine Code, and Execution Times:
Source Form
ADDD # opr16i
ADDD opr8a
ADDD opr16a
ADDD oprx0_xysp
ADDD oprx9,xysp
ADDD oprx16,xysp
ADDD [D ,xysp ]
ADDD [ oprx16,xysp ]
CPU12
REFERENCE MANUAL
Add Double Accumulator
X
H
I
N
Z
∆
∆
–
–
–
N:
Set if MSB of result is set; cleared otherwise.
Z:
Set if result is $0000; cleared otherwise.
D15 • M15 • R15 + D15 • M15 • R15
V:
Set if two's complement overflow resulted from the operation; cleared
otherwise.
D15 • M15 + M15 • R15 + R15 • D15
C:
Set if there was a carry from the MSB of the result; cleared otherwise.
Address Mode
IMM
DIR
EXT
IDX
IDX1
IDX2
[D,IDX]
[IDX2]
INSTRUCTION GLOSSARY
V
C
∆
∆
Object Code
C3 jj kk
D3 dd
F3 hh ll
E3 xb
E3 xb ff
E3 xb ee ff
E3 xb
E3 xb ee ff
ADDD
Cycles
Access Detail
2
OP
3
RfP
3
ROP
3
RfP
3
RPO
4
fRPP
6
fIfRfP
6
fIPRfP
MOTOROLA
6-15
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