Motorola HC12 Refrence Manual page 31

MOVE Instruction Addressing Modes
MOVB
MOVW
Example:
1000 18 09 C2 20 00
Moves a byte of data from $2000 to $1009
The expected location of the PC = $1005. The offset = +2.
(1005 + 2 (for 2,PC) + 2 (for correction) = 1009)
$18 is the page pre-byte, 09 is the MOVB opcode for ext-idx, C2 is the indexed post-
byte for 2,PC (without correction).
The Motorola MCUasm assembler produces corrected object code for PC-relative
moves (18 09 C0 20 00 for the example shown). Note that, instead of assembling the
2,PC as C2, the correction has been applied to make it C0. Check whether an assem-
bler makes the correction before using PC-relative moves.
3.9.2 Bit Manipulation Instructions
Bit manipulation instructions use either a combination of two or a combination of three
addressing modes.
The BCLR and BSET instructions use an 8-bit mask to determine which bits in a mem-
ory byte are to be changed. The mask must be supplied with the instruction as an im-
mediate mode value. The memory location to be modified can be specified by means
of direct, extended, or indexed addressing modes.
The BRCLR and BRSET instructions use an 8-bit mask to test the states of bits in a
memory byte. The mask is supplied with the instruction as an immediate mode value.
The memory location to be tested is specified by means of direct, extended, or indexed
addressing modes. Relative addressing mode is used to determine the branch ad-
dress. A signed 8-bit offset must be supplied with the instruction.
CPU12
REFERENCE MANUAL
Table 3-3 PC Offsets for Move Instructions
IMM ⇒ IDX
EXT ⇒ IDX
IDX ⇒ EXT
IDX ⇒ IDX
IMM ⇒ IDX
EXT ⇒ IDX
IDX ⇒ EXT
IDX ⇒ IDX
MOVB
ADDRESSING MODES
Offset Value
+ 1
+ 2
– 2
– 1 for 1st Operand
+ 1 for 2nd Operand
+ 2
+ 2
– 2
– 1 for 1st Operand
+ 1 for 2nd Operand
$2000 2,PC
MOTOROLA
3-11