Motorola HC12 Refrence Manual page 344

Table A-1 Instruction Set Summary (Continued)
Source
Form
(M) ⇒ M equivalent to $FF – (M) ⇒ M
COM opr
1's Complement Memory Location
(A) ⇒ A Complement Accumulator A
COMA
(B) ⇒ B Complement Accumulator B
COMB
CPD opr (A:B) – (M:M+1)
Compare D to Memory (16-Bit)
CPS opr (SP) – (M:M+1)
Compare SP to Memory (16-Bit)
CPX opr (X) – (M:M+1)
Compare X to Memory (16-Bit)
CPY opr (Y) – (M:M+1)
Compare Y to Memory (16-Bit)
DAA Adjust Sum to BCD
Decimal Adjust Accumulator A
DBEQ cntr , rel (cntr) – 1⇒ cntr
if (cntr) = 0, then Branch
else Continue to next instruction
Decrement Counter and Branch if = 0
(cntr = A, B, D, X, Y, or SP)
(cntr) – 1 ⇒ cntr
DBNE cntr , rel
If (cntr) not = 0, then Branch;
else Continue to next instruction
Decrement Counter and Branch if ≠ 0
(cntr = A, B, D, X, Y, or SP)
MOTOROLA
A-6
Operation
INSTRUCTION REFERENCE
Addr. Machine
Mode Coding (hex)
EXT 71 hh ll
IDX 61 xb
IDX1 61 xb ff
IDX2 61 xb ee ff
[D,IDX] 61 xb
[IDX2] 61 xb ee ff
INH 41
INH 51
IMM 8C jj kk
DIR 9C dd
EXT BC hh ll
IDX AC xb
IDX1 AC xb ff
IDX2 AC xb ee ff
[D,IDX] AC xb
[IDX2] AC xb ee ff
IMM 8F jj kk
DIR 9F dd
EXT BF hh ll
IDX AF xb
IDX1 AF xb ff
IDX2 AF xb ee ff
[D,IDX] AF xb
[IDX2] AF xb ee ff
IMM 8E jj kk
DIR 9E dd
EXT BE hh ll
IDX AE xb
IDX1 AE xb ff
IDX2 AE xb ee ff
[D,IDX] AE xb
[IDX2] AE xb ee ff
IMM 8D jj kk
DIR 9D dd
EXT BD hh ll
IDX AD xb
IDX1 AD xb ff
IDX2 AD xb ee ff
[D,IDX] AD xb
[IDX2] AD xb ee ff
INH 18 07
REL 04 lb rr
(9-bit)
REL 04 lb rr
(9-bit)
*
~
S X H I N Z V C
– – ∆ ∆
4 – – 0
3
4
5
6
6
1
1
– – ∆ ∆ ∆
2 – –
3
3
3
3
4
6
6
– – ∆ ∆ ∆
2 – –
3
3
3
3
4
6
6
– – ∆ ∆ ∆
2 – –
3
3
3
3
4
6
6
– – ∆ ∆ ∆
2 – –
3
3
3
3
4
6
6
– – ∆ ∆
3 – – ?
3 – – – – – – –
3 – – – – – – –
CPU12
REFERENCE MANUAL
1
∆
∆
∆
∆
∆
–
–