Motorola HC12 Refrence Manual page 363

Table A-6 Loop Primitive Postbyte Encoding (lb)
00 A 10 A 20
DBEQ DBEQ DBNE
(+) (–) (+)
01 B 11 B 21
DBEQ DBEQ DBNE
(+) (–) (+)
02 12 22
— — —
03 13 23
— — —
04 D 14 D 24
DBEQ DBEQ DBNE
(+) (–) (+)
05 X 15 X 25
DBEQ DBEQ DBNE
(+) (–) (+)
06 Y 16 Y 26
DBEQ DBEQ DBNE
(+) (–) (+)
07 SP 17 SP 27
DBEQ DBEQ DBNE
(+) (–) (+)
postbyte (hex)
branch condition
CPU12
REFERENCE MANUAL
A 30 A 40 A 50
DBNE TBEQ TBEQ
(–) (+) (–)
B 31 B 41 B 51
DBNE TBEQ TBEQ
(–) (+) (–)
32 42 52
— — —
33 43 53
— — —
D 34 D 44 D 54
DBNE TBEQ TBEQ
(–) (+) (–)
X 35 X 45 X 55
DBNE TBEQ TBEQ
(–) (+) (–)
Y 36 Y 46 Y 56
DBNE TBEQ TBEQ
(–) (+) (–)
SP 37 SP 47 SP 57
DBNE TBEQ TBEQ
(–) (+) (–)
B0 A
_BEQ
(–)
INSTRUCTION REFERENCE
A 60 A 70 A 80
TBNE TBNE IBEQ
(+) (–) (+)
B 61 B 71 B 81
TBNE TBNE IBEQ
(+) (–) (+)
62 72 82
— — —
63 73 83
— — —
D 64 D 74 D 84
TBNE TBNE IBEQ
(+) (–) (+)
X 65 X 75 X 85
TBNE TBNE IBEQ
(+) (–) (+)
Y 66 Y 76 Y 86
TBNE TBNE IBEQ
(+) (–) (+)
SP 67 SP 77 SP 87
TBNE TBNE IBEQ
(+) (–) (+)
counter used
sign of 9-bit relative branch offset
(lower eight bits are an extension byte
following postbyte)
A 90 A A0 A B0
IBEQ IBNE IBNE
(–) (+) (–)
B 91 B A1 B B1
IBEQ IBNE IBNE
(–) (+) (–)
92 A2 B2
— — —
93 A3 B3
— — —
D 94 D A4 D B4
IBEQ IBNE IBNE
(–) (+) (–)
X 95 X A5 X B5
IBEQ IBNE IBNE
(–) (+) (–)
Y 96 Y A6 Y B6
IBEQ IBNE IBNE
(–) (+) (–)
SP 97 SP A7 SP B7
IBEQ IBNE IBNE
(–) (+) (–)
MOTOROLA
A
B
D
X
Y
SP
A-25