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Table B-3 Comparison of Math Instruction Speeds
Instruction
Mnemonic
MUL
EMUL
EMULS
IDIV
FDIV
EDIV
EDIVS
IDIVS
EMACS
The IDIVS instruction is included specifically for C compilers, where word-sized oper-
ands are divided to produce a word-sized result (unlike the 32 ÷ 16 = 16 EDIV). The
EMUL and EMULS instructions place the result in registers so a C compiler can
choose to use only 16 bits of the 32-bit result.
B.6.3 Code Size Reduction
CPU12 assembly language programs written from scratch tend to be 30% smaller
than equivalent programs written for the M68HC11. This figure has been indepen-
dently qualified by Motorola programmers and an independent C compiler vendor.
The major contributors to the reduction appear to be improved indexed addressing
and the universal transfer/exchange instruction.
In some specialized areas, the reduction is much greater. A fuzzy logic inference ker-
nel requires about 250 bytes in the M68HC11, and the same program for the CPU12
requires about 50 bytes. The CPU12 fuzzy logic instructions replace whole subrou-
tines in the M68HC11 version. Table lookup instructions also greatly reduce code
space.
Other CPU12 code space reductions are more subtle. Memory to memory moves are
one example. The CPU12 move instruction requires almost as many bytes as an
equivalent sequence of M68HC11 instructions, but the move operations themselves
do not require the use of an accumulator. This means that the accumulator often
need not be saved and restored, which saves instructions.
MOTOROLA
B-10
M68HC11
Math
1 Cycle = 250
Operation
8 × 8 = 16
10 cycles
(signed)
16 × 16 = 32
(unsigned)
16 × 16 = 32
(signed)
16 ÷ 16 = 16
41 cycles
(unsigned)
16 ÷ 16 = 16
41 cycles
(fractional)
32 ÷ 16 = 16
(unsigned)
32 ÷ 16 = 16
(signed)
16 ÷ 16 = 16
(signed)
32 × (16 × 16) ⇒ 32
(signed MAC)
M68HC11 TO M68HC12 UPGRADE PATH
M68HC11
w/Coprocessor
ns
1 Cycle = 250 ns
—
—
20 cycles
—
20 cycles
—
—
—
33 cycles
—
37 cycles
—
—
—
20 cycles
CPU12
1 Cycle = 125 ns
3 cycles
3 cycles
3 cycles
12 cycles
12 cycles
11 cycles
12 cycles
12 cycles
12 cycles
CPU12
REFERENCE MANUAL
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