Motorola HC12 Refrence Manual page 346

Table A-1 Instruction Set Summary (Continued)
Source
Form
(A) ⊕ (M) ⇒ A
EORA opr
Exclusive-OR A with Memory
(B) ⊕ (M) ⇒ B
EORB opr
Exclusive-OR B with Memory
(M:M+1)+ [(B)×((M+2:M+3) – (M:M+1))] ⇒ D
ETBL opr
16-Bit Table Lookup and Interpolate
Initialize B, and index before ETBL.
<ea> points at first table entry (M:M+1)
and B is fractional part of lookup value
(no indirect addr. modes allowed)
(r1) ⇔ (r2) (if r1 and r2 same size) or
EXG r1 , r2
$00:(r1) ⇒ r2 (if r1=8-bit; r2=16-bit) or
) ⇔ (r2) (if r1=16-bit; r2=8-bit)
(r1
low
r1 and r2 may be
A, B, CCR, D, X, Y, or SP
(D) ÷ (X) ⇒ X; r ⇒ D
FDIV
16 × 16 Bit Fractional Divide
IBEQ cntr , rel (cntr) + 1⇒ cntr
If (cntr) = 0, then Branch
else Continue to next instruction
Increment Counter and Branch if = 0
(cntr = A, B, D, X, Y, or SP)
IBNE cntr , rel (cntr) + 1⇒ cntr
if (cntr) not = 0, then Branch;
else Continue to next instruction
Increment Counter and Branch if ≠ 0
(cntr = A, B, D, X, Y, or SP)
(D) ÷ (X) ⇒ X; r ⇒ D
IDIV
16 × 16 Bit Integer Divide (unsigned)
(D) ÷ (X) ⇒ X; r ⇒ D
IDIVS
16 × 16 Bit Integer Divide (signed)
MOTOROLA
A-8
Operation
INSTRUCTION REFERENCE
Addr. Machine
Mode Coding (hex)
IMM 88 ii
DIR 98 dd
EXT B8 hh ll
IDX A8 xb
IDX1 A8 xb ff
IDX2 A8 xb ee ff
[D,IDX] A8 xb
[IDX2] A8 xb ee ff
IMM C8 ii
DIR D8 dd
EXT F8 hh ll
IDX E8 xb
IDX1 E8 xb ff
IDX2 E8 xb ee ff
[D,IDX] E8 xb
[IDX2] E8 xb ee ff
IDX 18 3F xb
INH B7 eb
INH 18 11
REL 04 lb rr
(9-bit)
REL 04 lb rr
(9-bit)
INH 18 10
INH 18 15
*
~
S X H I N Z V C
– – ∆ ∆
1 – – 0
3
3
3
3
4
6
6
– – ∆ ∆
1 – – 0
3
3
3
3
4
6
6
– – ∆ ∆
10 – – –
1 – – – – – – –
∆ ∆
12 – – – – –
3 – – – – – – –
3 – – – – – – –
∆
12 – – – – – 0
– – ∆ ∆ ∆
12 – –
CPU12
REFERENCE MANUAL
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∆
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